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CBTU4411EE,551

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
CBTU4411 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 18 June 2012 10 of 21
NXP Semiconductors
CBTU4411
11-bit DDR2 SDRAM MUX/bus switch with 12 Ω ON resistance
10. Dynamic characteristics
[1] This parameter is not production tested.
[2] Skew is not production tested.
[3] Difference of rising edge propagation delay to falling edge propagation delay.
Fig 6. Pull-down resistance versus voltage
350
425
400
375
450
R
PD
(Ω)
V
DIMM
− V
bias
(V)
0 0.80.60.2 0.4
002aae863
Table 9. Dynamic characteristics
V
DD
=1.8V
±
0.1 V.
Symbol Parameter Conditions Min Typ Max Unit
t
PD
propagation delay from HPn or xDPn to xDPn or HPn;
Figure 9, Figure 13
[1]
-50100ps
t
PZH
driver enable delay to HIGH level from Sn to HPn or xDPn 0.75 - 1.75 ns
t
PZL
driver enable delay to LOW level from Sn to HPn or xDPn 0.75 - 1.75 ns
t
PHZ
driver disable delay from HIGH level from Sn to HPn or xDPn 0.75 - 1.75 ns
t
PLZ
driver disable delay from LOW level from Sn to HPn or xDPn 0.75 - 1.75 ns
t
sk(o)
output skew time from any output to any output;
Figure 12
[2]
-2530ps
t
sk(edge)
edge skew time Figure 11
[2][3]
-2530ps
CBTU4411 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 18 June 2012 11 of 21
NXP Semiconductors
CBTU4411
11-bit DDR2 SDRAM MUX/bus switch with 12 Ω ON resistance
11. HPn to xDPn AC waveforms and test circuit
Fig 7. Input to output propagation delays
(1) See Section 6.1 “Function selection”.
(2) Waveform 1 is for an output with internal conditions such that the output is HIGH except when
disabled by the output control.
Fig 8. 3-state output enable and disable times
All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10 MHz; Z
o
=50Ω; slew rate = 2.5 V/ns.
The outputs are measured one at a time with one transition per measurement.
Fig 9. Test circuit (HPn to xDPn)
002aae864
1.8 V
0 V
V
OH
V
OL
t
PLH
t
PHL
0.9 V0.9 V
0.9 V 0.9 Vinput
output
002aae865
1.8 V
V
ref
V
ref
EN, Sn
(1)
0 V
V
OH
V
bias
0.9 V
V
OH
− 100 mV
output
waveform 1
(2)
t
PZH
t
PHZ
Z
o
= 40 Ω
SSTL_18
driver
10.16 cm (4")
DUT
HPn xDPn
Z
o
= 40 Ω
2.54 cm (1")
C
L
6 pF
75 Ω
V
T
= V
ref
002aae866
CBTU4411 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 4 — 18 June 2012 12 of 21
NXP Semiconductors
CBTU4411
11-bit DDR2 SDRAM MUX/bus switch with 12 Ω ON resistance
12. xDPn to HPn AC waveforms and test circuit
(1) See Section 6.1 “Function selection”.
(2) Waveform 1 is for an output with internal conditions such that the output is LOW except when
disabled by the output control.
(3) Waveform 2 is for an output with internal conditions such that the output is HIGH except when
disabled by the output control.
Fig 10. 3-state output enable and disable times
Fig 11. Rising and falling edge skew
Fig 12. Skew between any two outputs
002aae867
1.8 V
1.8 V
t
PLZ
V
ref
V
ref
EN, Sn
(1)
output
waveform 1
(2)
0.9 V
t
PZL
V
OL
0 V
V
OL
+ 100 mV
V
OH
V
OL
0.9 V
V
OH
− 100 mV
output
waveform 2
(3)
t
PZH
t
PHZ
002aae868
1.8 V
0 V
V
OH
V
OL
rising t
sk(edge)
0.9 V0.9 V
0.9 V 0.9 Vinput
output
falling t
sk(edge)
002aac820
t
sk(o)
any two
outputs
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CBTU4411EE,551

Mfr. #:
Buy CBTU4411EE,551
Manufacturer:
NXP Semiconductors
Description:
Multiplexer Switch ICs CBTU4411EE/LFBGA72///TRAY SINGLE DP BAKEABLE
Lifecycle:
New from this manufacturer.
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