4
7679HS–CAN–08/08
AT90CAN32/64/128
1.4 Block Diagram
Figure 1-1. Block Diagram
PROGRAM
COUNTER
STACK
POINTER
PROGRAM
FLASH
MCU CONTROL
REGISTER
SRAM
GENERAL
PURPOSE
REGISTERS
INSTRUCTION
REGISTER
TIMER/
COUNTERS
INSTRUCTION
DECODER
DATA DIR.
REG. PORTB
DATA DIR.
REG. PORTE
DATA DIR.
REG. PORTA
DATA DIR.
REG. PORTD
DATA REGISTER
PORTB
DATA REGISTER
PORTE
DATA REGISTER
PORTA
DATA REGISTER
PORTD
INTERRUPT
UNIT
EEPROM
SPIUSART0
STATUS
REGISTER
Z
Y
X
ALU
PORTB DRIVERS
PORTE DRIVERS
PORTA DRIVERS
PORTF DRIVERS
PORTD DRIVERS
PORTC DRIVERS
PB7 - PB0PE7 - PE0
PA7 - PA0PF7 - PF0
RESET
VCC
AGND
GND
AREF
XTAL1
XTAL2
CONTROL
LINES
+
-
ANALOG
COMPARATOR
PC7 - PC0
INTERNAL
OSCILLATOR
WATCHDOG
TIMER
8-BIT DATA BUS
AVCC
USART1
TIMING AND
CONTROL
OSCILLATOR
OSCILLATOR
CALIB. OSC
DATA DIR.
REG. PORTC
DATA REGISTER
PORTC
ON-CHIP DEBUG
JTAG TAP
PROGRAMMING
LOGIC
BOUNDARY-
SCAN
DATA DIR.
REG. PORTF
DATA REGISTER
PORTF
ADC
POR - BOD
RESET
PD7 - PD0
DATA DIR.
REG. PORTG
DATA REG.
PORTG
PORTG DRIVERS
PG4 - PG0
TWO-WIRE SERIAL
INTERFACE
CAN
CONTROLLER
5
7679HS–CAN–08/08
AT90CAN32/64/128
1.5 Pin Configurations
Figure 1-2. Pinout AT90CAN32/64/128 - TQFP
PC0 (A8)
VCC
GND
PF0 (ADC0)
PF7 (ADC7 / TDI)
PF1 (ADC1)
PF2 (ADC2)
PF3 (ADC3)
PF4 (ADC4 / TCK)
PF5 (ADC5 / TMS)
PF6 (ADC6 / TDO)
AREF
GND
AVCC
17
61
60
18
59
20
58
19
21
57
22
56
23
55
24
54
25
53
26
52
27
51
29
28
50
49
32
31
30
(RXD0 / PDI) PE0
(TXD0 / PDO) PE1
(XCK0 / AIN0) PE2
(OC3A / AIN1) PE3
(OC3B / INT4) PE4
(OC3C / INT5) PE5
(T3 / INT6) PE6
(ICP3 / INT7) PE7
(SS) PB0
(SCK) PB1
(MOSI) PB2
(MISO) PB3
(OC2A) PB4
(OC0A / OC1C) PB7
(TOSC2 ) PG3
(OC1B) PB6
(TOSC1 ) PG4
(OC1A) PB5
PC1 (A9)
(T0) PD7
PC2 (A10)
PC3 (A11)
PC4 (A12)
PC5 (A13)
PC6 (A14)
PC7 (A15 / CLKO)
PA7 (AD7)
PG2 (ALE)
PA6 (AD6)
PA5 (AD5)
PA4 (AD4)
PA3 (AD3)
PA0 (AD0)
PA1 (AD1)
PA2 (AD2)
(RXCAN / T1) PD6
(TXCAN / XCK1) PD5
(ICP1) PD4
(TXD1 / INT3) PD3
(RXD1 / INT2) PD2
(SDA / INT1) PD1
(SCL / INT0) PD0
XTAL1
XTAL2
RESET
GND
VCC
PG1 (RD)
PG0 (WR)
2
3
1
4
5
6
7
8
9
10
11
12
13
14
16
15
64
63
62
47
46
48
45
44
43
42
41
40
39
38
37
36
35
33
34
(2)
(2)
NC = Do not connect (May be used in future devices)
(1)
Timer2 Oscillator
(2)
NC
(1)
(64-lead TQFP top view)
INDEX CORNER
6
7679HS–CAN–08/08
AT90CAN32/64/128
Figure 1-3. Pinout AT90CAN32/64/128 - QFN
Note: The large center pad underneath the QFN package is made of metal and internally connected to
GND. It should be soldered or glued to the board to ensure good mechanical stability. If the center
pad is left unconnected, the package might loosen from the board.
1.6 Pin Descriptions
1.6.1 VCC
Digital supply voltage.
1.6.2 GND
Ground.
NC = Do not connect (May be used in future devices)
(1)
Timer2 Oscillator
(2)
PC0 (A8)
VCC
GND
PF0 (ADC0)
PF7 (ADC7 / TDI)
PF1 (ADC1)
PF2 (ADC2)
PF3 (ADC3)
PF4 (ADC4 / TCK)
PF5 (ADC5 / TMS)
PF6 (ADC6 / TDO)
AREF
GND
AVCC
(RXD0 / PDI) PE0
(TXD0 / PDO) PE1
(XCK0 / AIN0) PE2
(OC3A / AIN1) PE3
(OC3B / INT4) PE4
(OC3C / INT5) PE5
(T3 / INT6) PE6
(ICP3 / INT7) PE7
(SS) PB0
(SCK) PB1
(MOSI) PB2
(MISO) PB3
(OC2A) PB4
(OC0A / OC1C) PB7
(TOSC2 ) PG3
(OC1B) PB6
(TOSC1 ) PG4
(OC1A) PB5
PC1 (A9)
(T0) PD7
PC2 (A10)
PC3 (A11)
PC4 (A12)
PC5 (A13)
PC6 (A14)
PC7 (A15 / CLKO)
PA7 (AD7)
PG2 (ALE)
PA6 (AD6)
PA5 (AD5)
PA4 (AD4)
PA3 (AD3)
PA0 (AD0)
PA1 (AD1)
PA2 (AD2)
(RXCAN / T1) PD6
(TXCAN / XCK1) PD5
(ICP1) PD4
(TXD1 / INT3) PD3
(RXD1 / INT2) PD2
(SDA / INT1) PD1
(SCL / INT0) PD0
XTAL1
XTAL2
RESET
GND
VCC
PG1 (RD)
PG0 (WR)
2
3
1
4
5
6
7
8
9
10
11
12
13
14
16 33
15
47
46
48
45
44
43
42
41
40
39
38
37
36
35
34
(2)
(2)
NC
(1)
17
18
20
19
21
22
23
24
25
26
27
29
28
32
31
30
52
51
50
49
64
63
62
53
61
60
59
58
57
56
55
54
(64-lead QFN top view)
INDEX CORNER

AT90CAN128-16MU

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
8-bit Microcontrollers - MCU AVRC11N AVR UC 128K FLASH
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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