LTC3548A
8
3548afa
OPERATION
The LTC3548A uses a constant frequency, current mode
architecture. The operating frequency is set at 2.25MHz
and can be synchronized to an external oscillator. Both
channels share the same clock and run in phase. To suit
a variety of applications, the selectable MODE/SYNC pin
allows the user to trade-off noise for efficiency.
The output voltage is set by an external divider returned
to the V
FB
pins. An error amplifier compares the divided
output voltage with a reference voltage of 0.6V and adjusts
the peak inductor current accordingly. Overvoltage and
undervoltage comparators will pull the POR output low if
the output voltage is not within ±8.5%. The POR output
will go high after 65,536 clock cycles (about 29ms in
pulse-skipping mode) of achieving regulation.
Main Control Loop
During normal operation, the top power switch (P-channel
MOSFET) is turned on at the beginning of a clock cycle when
the V
FB
voltage is below the reference voltage. The current
into the inductor and the load increases until the current
limit is reached. The switch turns off and energy stored in
the inductor flows through the bottom switch (N-channel
MOSFET) into the load until the next clock cycle.
The peak inductor current is controlled by the internally
compensated I
TH
voltage, which is the output of the er-
ror amplifier. This amplifier compares the V
FB
pin to the
0.6V reference. When the load current increases, the
V
FB
voltage decreases slightly below the reference. This
decrease causes the error amplifier to increase the I
TH
voltage until the average inductor current matches the
new load current.
The main control loop is shut down by pulling the RUN/SS
pin to ground.
Low Current Operation
Two modes are available to control the operation of the
LTC3548A at low currents. Both modes automatically
switch from continuous operation to the selected mode
when the load current is low.
To optimize efficiency, the Burst Mode operation can be
selected. When the load is relatively light, the LTC3548A
automatically switches into Burst Mode operation in which
the PMOS switch operates intermittently based on load
demand with a fixed peak inductor current. By running
cycles periodically, the switching losses which are domi-
nated by the gate charge losses of the power MOSFETs
are minimized. The main control loop is interrupted when
the output voltage reaches the desired regulated value. A
voltage comparator trips when I
TH
is below 0.65V, shutting
off the switch and reducing the power. The output capaci-
tor and the inductor supply the power to the load until I
TH
exceeds 0.65V, turning on the switch and the main control
loop which starts another cycle.
For lower ripple noise at low currents, the pulse-skipping
mode can be used. In this mode, the LTC3548A continues
to switch at a constant frequency down to very low cur-
rents, where it will begin skipping pulses.
Dropout Operation
When the input supply voltage decreases toward the
output voltage, the duty cycle increases to 100% which
is the dropout condition. In dropout, the PMOS switch is
turned on continuously with the output voltage being equal
to the input voltage minus the voltage drops across the
internal P-channel MOSFET and the inductor.
An important design consideration is that the R
DS(ON)
of the P-channel switch increases with decreasing input
supply voltage (See Typical Performance Characteristics).
Therefore, the user should calculate the power dissipation
when the LTC3548A is used at 100% duty cycle with low
input voltage (See Thermal Considerations in the Applica-
tions Information Section).
Low Supply Operation
The LTC3548A incorporates an undervoltage lockout circuit
which shuts down the part when the input voltage drops
below about 1.65V to prevent unstable operation.
A general LTC3548A application circuit is shown in Figure 1.
External component selection is driven by the load require-
ment, and begins with the selection of the inductor L. Once
the inductor is chosen, C
IN
and C
OUT
can be selected.
