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CY62128BLL-70ZRXET

P1-P3P4-P6P7-P9P10-P11
128K x 8 Static RAM
CY62128B
MoBL
Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-05300 Rev. *C Revised February 14, 2005
Features
• Temperature Ranges
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive: –40°C to 125°C
• 4.5V – 5.5V operation
• CMOS for optimum speed/power
• Low active power
(70 ns, LL version, Commercial, Industrial)
— 82.5 mW (max.) (15 mA)
• Low standby power
(70 ns, LL version, Commercial, Industrial)
—110 µW (max.) (15 µA)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE
1
, CE
2
, and OE options
Functional Description
[1]
The CY62128B is a high-performance CMOS static RAM
organized as 131,072 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE
1
),
an active HIGH Chip Enable (CE
2
), an active LOW Output
Enable (OE
), and three-state drivers. This device has an
automatic power-down feature that reduces power
consumption by more than 75% when deselected.
Writing to the device is accomplished by taking Chip Enable
One (CE
1
) and Write Enable (WE) inputs LOW and Chip
Enable Two (CE
2
) input HIGH. Data on the eight I/O pins (I/O
0
through I/O
7
) is then written into the location specified on the
address pins (A
0
through A
16
).
Reading from the device is accomplished by taking Chip
Enable One (CE
1
) and Output Enable (OE) LOW while forcing
Write Enable (WE
) and Chip Enable Two (CE
2
) HIGH. Under
these conditions, the contents of the memory location
specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O
0
through I/O
7
) are placed in a
high-impedance state when the device is deselected (CE
1
HIGH or CE
2
LOW), the outputs are disabled (OE HIGH), or
during a write operation (CE
1
LOW, CE
2
HIGH, and WE LOW).
The CY62128B is available in a standard 450-mil-wide SOIC,
32-pin TSOP type I and STSOP packages.
Note:
1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.
14
15
Logic Block Diagram
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
COLUMN
DECODER
ROW DECODER
SENSE AMPS
INPUT BUFFER
POWER
DOWN
WE
OE
I/O
0
CE
2
I/O
1
I/O
2
I/O
3
512x256x 8
ARRAY
I/O
7
I/O
6
I/O
5
I/O
4
A
0
A
11
A
13
A
12
A
A
10
CE
1
A
A
16
A
9
CY62128B
MoBL
Document #: 38-05300 Rev. *C Page 2 of 11
Pin Configurations
Product Portfolio
Product
V
CC
Range (V)
Speed
(ns)
Power Dissipation
Operating, I
CC
(mA)
Standby, I
SB2
(µA)
Min. Typ.
[2]
Max. Typ.
[2]
Max. Typ.
[2]
Max.
CY62128BLL Industrial 4.5 5.0 5.5 55 7.5 20 2.5 15
Industrial 70 6 15 2.5 15
Automotive 70 6 25 2.5 25
Pin Definitions
Input A
0
-A
16
. Address Inputs
Input/Output I/O
0
-I/O
7
. Data lines. Used as input or output lines depending on operation
Input/Control WE
. Write Enable, Active LOW. When selected LOW, a WRITE is conducted. When selected HIGH, a READ
is conducted.
Input/Control CE
1
. Chip Enable 1, Active LOW.
Input/Control CE
2
. Chip Enable 2, Active HIGH.
Input/Control OE
. Output Enable, Active LOW. Controls the direction of the I/O pins. When LOW, the I/O pins behave as
outputs. When deasserted HIGH, I/O pins are three-stated, and act as input data pins
Ground GND. Ground for the device
Power Supply V
CC
. Power supply for the device
Notes:
2. Typical values are included for reference only and are not tested or guaranteed. Typical values are an average of the distribution across normal production
variations as measured at V
CC
= 5.0V, T
A
= 25°C, and t
AA
= 70 ns.
1
2
3
4
5
6
7
8
9
10
11
14
19
20
24
23
22
21
25
28
27
26
Top View
12
13
29
32
31
30
16
15
17
18
A
16
A
14
A
12
A
7
A
6
A
5
A
4
A
3
WE
V
CC
A
15
A
13
A
8
A
9
I/O
7
I/O
6
I/O
5
I/O
4
A
2
NC
I/O
0
I/O
1
I/O
2
CE
1
OE
A
10
I/O
3
A
1
A
0
A
11
CE
2
A
6
A
7
A
16
A
14
A
12
WE
V
CC
A
4
A
13
A
8
A
9
OE
TSOP I
Top View
(not to scale)
1
6
2
3
4
5
7
32
27
31
30
29
28
26
21
25
24
23
22
19
20
I/O
2
I/O
1
GND
I/O
7
I/O
4
I/O
5
I/O
0
CE
1
A
11
A
5
17
18
8
9
10
11
12
13
14
15
16
CE
2
A
15
NC
A
10
I/O
3
A
1
A
0
A
3
A
2
SOIC
A
6
A
7
A
16
A
14
A
12
WE
V
CC
A
4
A
13
A
8
A
9
OE
Reverse TSOP I
1
6
2
3
4
5
7
32
27
31
30
29
28
26
21
25
24
23
22
19
20
I/O
2
I/O
1
GND
I/O
7
I/O
4
I/O
5
I/O
6
I/O
0
CE
1
A
11
A
5
17
18
8
9
10
11
12
13
14
15
16
CE
2
A
15
NC
A
10
I/O
3
A
1
A
0
A
3
A
2
(not to scale)
Top View
A
6
A
7
A
16
A
14
A
12
WE
V
CC
A
4
A
13
A
8
A
9
OE
STSOP
Top View
(not to scale)
25
30
26
27
28
29
31
24
19
23
22
21
20
18
13
17
16
15
14
11
12
I/O
2
I/O
1
GND
I/O
7
I/O
4
I/O
5
I/O
6
I/O
0
CE
1
A
11
A
5
9
10
32
1
2
3
4
5
6
7
8
CE
2
A
15
NC
A
10
I/O
3
A
1
A
0
A
3
A
2
25
GN
gnc
G
g
GND
I/O
6
CY62128B
MoBL
Document #: 38-05300 Rev. *C Page 3 of 11
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage on V
CC
to Relative GND
[3]
.... –0.5V to +7.0V
DC Voltage Applied to Outputs
in High-Z State
[3]
....................................–0.5V to V
CC
+ 0.5V
DC Input Voltage
[3]
.................................–0.5V to V
CC
+ 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage...........................................> 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current.....................................................> 200 mA
Operating Range
Range
Ambient
Temperature (T
A
)
[4]
V
CC
Commercial 0°C to +70°C 5V ± 10%
Industrial –40°C to +85°C5V ± 10%
Automotive –40°C to +125°C5V ± 10%
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions
CY62128B-55 CY62128B-70
Unit
Min. Typ.
[2]
Max. Min. Typ.
[2]
Max.
V
OH
Output HIGH Voltage V
CC
= Min., I
OH
= –1.0 mA 2.4 2.4 V
V
OL
Output LOW Voltage V
CC
= Min., I
OL
= 2.1 mA 0.4 0.4 V
V
IH
Input HIGH Voltage 2.2 V
CC
+
0.3
2.2 V
CC
+
0.3
V
V
IL
Input LOW Voltage
[3]
–0.3 0.8 –0.3 0.8 V
I
IX
Input Load Current GND ≤ V
I
≤ V
CC
–1 +1 –1 +1 µA
Automotive
–10 +10 µA
I
OZ
Output Leakage
Current
GND ≤ V
I
≤ V
CC
,
Output Disabled
–1 +1 –1 +1 µA
Automotive
–10 +10 µA
I
OS
Output Short Circuit
Current
[5]
V
CC
= Max., V
OUT
= GND –300 –300 mA
I
CC
V
CC
Operating
Supply Current
V
CC
= Max.,
I
OUT
= 0 mA,
f = f
MAX
= 1/t
RC
Industrial,
Commercial
7.5 20 6 15 mA
Automotive
625mA
I
SB1
Automatic CE
Power-down Current
—TTL Inputs
Max. V
CC
,
CE
1
≥ V
IH
or CE
2
< V
IL
,
V
IN
≥ V
IH
or
V
IN
≤ V
IL
, f = f
MAX
Industrial
Commercial
0.1 20.11mA
Automotive
0.1 2 mA
I
SB2
Automatic CE
Power-down Current
—CMOS Inputs
Max. V
CC
,
CE
1
≥ V
CC
– 0.3V,
or CE
2
≤ 0.3V,
V
IN
≥ V
CC
– 0.3V,
or V
IN
≤ 0.3V, f = 0
Industrial
Commercial
2.5 15 2.5 15 µA
Automotive
2.5 25 µA
Thermal Resistance
[6]
Parameter Description Test Conditions 32 SOIC 32 TSOP 32 STSOP 32 RTSOP Unit
Θ
JA
Thermal Resistance
(Junction to Ambient)
Test conditions follow standard test
methods and procedures for
measuring thermal impedance, per
EIA / JESD51.
66.17 97.44 105.14 97.44 °C/W
Θ
JC
Thermal Resistance
(Junction to Case)
30.87 26.05 14.09 26.05 °C/W
Note:
3. V
IL
(min.) = –2.0V for pulse durations of less than 20 ns.
4. T
A
is the “Instant On” case temperature.
5. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
6. Tested initially and after any design or process changes that may affect these parameters.
P1-P3P4-P6P7-P9P10-P11

CY62128BLL-70ZRXET

Mfr. #:
Buy CY62128BLL-70ZRXET
Manufacturer:
Cypress Semiconductor
Description:
IC SRAM 1M PARALLEL 32TSOP I
Lifecycle:
New from this manufacturer.
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