AD7940
Rev. A | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 4.
Parameter Rating
V
DD
to GND 0.3 V to +7 V
Analog Input Voltage to GND 0.3 V to V
DD
+ 0.3 V
Digital Input Voltage to GND 0.3 V to +7 V
Digital Output Voltage to GND 0.3 V to V
DD
+ 0.3 V
Input Current to Any Pin Except Supplies
1
±10 mA
Operating Temperature Range
Commercial (B Version) 40°C to +85°C
Storage Temperature Range 65°C to +150°C
Junction Temperature 150°C
SOT-23 Package, Power Dissipation 450 mW
θ
JA
Thermal Impedance 229.6°C/W
θ
JC
Thermal Impedance 91.99°C/W
MSOP Package, Power Dissipation 450 mW
θ
JA
Thermal Impedance 205.9°C/W
θ
JC
Thermal Impedance 43.74°C/W
Lead Temperature, Soldering
Vapor Phase (60 secs) 215°C
Infared (15 secs) 220°C
ESD 4 kV
1
Transient currents of up to 100 mA will not cause SCR latch-up.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
AD7940
Rev. A | Page 7 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
03305-0-023
CS
SDATA
SCLK
6
5
4
V
DD
1
GND
2
V
IN
3
AD7940
TOP VIEW
(Not to Scale)
SOT-23
Figure 3. SOT-23 Pin Configuration
03305-0-003
NC = NO CONNECT
AD7490
MSOP
TOP VIEW
(Not to Scale)
V
DD
1
GND
2
GND
3
V
IN
4
CS
SDATA
NC
SCLK
8
7
6
5
Figure 4. MSOP Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
SOT-23
Pin No.
MSOP Mnemonic Function
1 1 V
DD
Power Supply Input. The V
DD
range for the AD7940 is from 2.5 V to 5.5 V.
2 2, 3 GND Analog Ground. Ground reference point for all circuitry on the AD7940. All analog input signals should
be referred to this GND voltage.
3 4 V
IN
Analog Input. Single-ended analog input channel. The input range is 0 V to V
DD
.
4 5 SCLK Serial Clock. Logic input. SCLK provides the serial clock for accessing data from this part. This clock
input is also used as the clock source for the AD7940's conversion process.
5 7 SDATA Data Out. Logic output. The conversion result from the AD7940 is provided on this output as a serial
data stream. The bits are clocked out on the falling edge of the SCLK input. The data stream from the
AD7940 consists of two leading zeros followed by 14 bits of conversion data that are provided MSB
first. This will be followed by four trailing zeroes if
CS
is held low for a total of 24 SCLK cycles. See the
Serial Interface section.
6 8
CS
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on
the AD7940 and framing the serial data transfer.
N/A 6 NC No Connect. This pin should be left unconnected.
AD7940
Rev. A | Page 8 of 20
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The
endpoints of the transfer function are zero scale, a point 1/2
LSB below the first code transition, and full scale, a point 1/2
LSB above the last code transition.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (00 . . . 000) to
(00 . . . 001) from the ideal, i.e., AGND + 1 LSB.
Gain Error
This is the deviation of the last code transition (111 . . . 110) to
(111 . . . 111) from the ideal (i.e., V
REF
− 1 LSB) after the offset
error has been adjusted out.
Track-and-Hold Acquisition Time
The track-and-hold amplifier returns to track mode at the end
of conversion. The track-and-hold acquisition time is the time
required for the output of the track-and-hold amplifier to reach
its final value, within ±1 LSB, after the end of the conversion.
See the Serial Interface section for more details.
Signal-to-(Noise + Distortion) Ratio
This is the measured ratio of signal-to-(noise + distortion) at
the output of the ADC. The signal is the rms amplitude of the
fundamental. Noise is the sum of all nonfundamental signals up
to half the sampling frequency (f
S
/2, excluding dc). The ratio
depends on the number of quantization levels in the digitization
process; the more levels, the smaller the quantization noise. The
theoretical signal-to-(noise + distortion) ratio for an ideal N-bit
converter with a sine wave input is given by
Signal-to-(Noise + Distortion) = (6.02 N + 1.76) dB
Thus, for a 14-bit converter, this is 86.04 dB.
Total Harmonic Distortion (THD)
THD is the ratio of the rms sum of harmonics to the
fundamental. For the AD7940, it is defined as
1
2
6
2
5
2
4
2
3
2
2
V
VVVVV
log20(dB)
++++
=THD
where V
1
is the rms amplitude of the fundamental and V
2
, V
3
,
V
4
, V
5
, and V
6
are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to f
S
/2, excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is
determined by the largest harmonic in the spectrum, but for
ADCs where the harmonics are buried in the noise floor, it will
be a noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and fb,
any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa ± nfb where m,
n = 0, 1, 2, 3. Intermodulation distortion terms are those for
which neither m nor n are equal to zero. For example, the second-
order terms include (fa + fb) and (fa − fb), while the third-order
terms include (2fa + fb), (2fa − fb), (fa + 2fb), and (fa −2fb).
The AD7940 is tested using the CCIF standard where two input
frequencies near the top end of the input bandwidth are used.
In this case, the second-order terms are usually distanced in
frequency from the original sine waves, while the third-order
terms are usually at a frequency close to the input frequencies.
As a result, the second- and third-order terms are specified
separately. The calculation of the intermodulation distortion is
as per the THD specification where it is the ratio of the rms
sum of the individual distortion products to the rms amplitude
of the sum of the fundamentals expressed in dBs.

AD7940BRM-REEL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 3mW 100 kSPS 14-Bit
Lifecycle:
New from this manufacturer.
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