OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

87946AYI-147LF

P1-P3P4-P6P7-P9P10-P12P13-P14
1©2016 Integrated Device Technology, Inc. Revision C, September 19, 2016
General Description
The 87946I-147 is a low skew, ÷1, ÷2 LVCMOS/LVTTL Fanout
Buffer. The 87946I-147 has two selectable single ended clock inputs.
The single ended clock inputs accept LVCMOS or LVTTL input
levels. The low impedance LVCMOS/LVTTL outputs are designed to
drive 50 series or parallel terminated transmission lines. The
effective fanout can be increased from 10 to 20 by utilizing the ability
of the outputs to drive two series terminated lines.
The divide select inputs, DIV_SELx, control the output frequency of
each bank. The outputs can be utilized in the ÷1, ÷2 or a combination
of ÷1 and ÷2 modes. The master reset input, MR/nOE, resets the
internal frequency dividers and also controls the active and high
impedance states of all outputs.
The 87946I-147 is characterized at full 3.3V for input V
DD,
and mixed
3.3V and 2.5V for output operating supply mode. Guaranteed bank,
output and part-to-part skew characteristics make the 87946I-147
ideal for those clock distribution applications demanding well defined
performance and repeatability.
Features
• Ten single ended LVCMOS/LVTTL outputs,
7 typical output impedance
• Selectable LVCMOS/LVTTL CLK0 and CLK1 inputs
• CLK0 and CLK1 can accept the following input levels:
LVCMOS and LVTTL
• Maximum input frequency: 250MHz
• Bank skew: 30ps (maximum)
• Output skew: 175ps (maximum)
• Part-to-part skew: 850ps (maximum)
• Multiple frequency skew: 200ps (maximum)
• 3.3V core, 3.3V or 2.5V output supply modes
• -40°C to 85°C ambient operating temperature
• Lead-free packaging
Block Diagram Pin Assignment
87946I-147
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
CLK0
CLK_SEL
CLK1
DIV_SELA
QA[0:2]
0
1
0
1
÷1
÷2
Pullup
Pullup
Pullup
Pulldown
Pulldown
DIV_SELB
DIV_SELC
QC[0:3]
0
1
Pulldown
MR/nOE
Pulldown
QB[0:2]
0
1
0
1
Pulldown
3
3
4
9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
CLK_SEL
V
DD
CLK0
CLK1
D
IV_SELA
D
IV_SELB
D
IV_SELC
GND
GN
D
QB
0
VDD
B
QB
1
GN
D
QB
2
VDD
B
VDD
C
V
DDC
QC0
G
ND
QC1
V
DDC
QC2
G
ND
QC3
GND
QA0
V
DDA
QA1
GND
QA2
V
DDA
M
R/nOE
1-to-10 Low Skew, 1, 2 LVCMOS/LVTTL
2.5V, 3.3V Fanout Buffer
87946I-147
Datasheet
2©2016 Integrated Device Technology, Inc. Revision C, September 19, 2016
87946I-147 Datasheet
Pin Descriptions and Characteristics
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Number Name Type Description
1 CLK_SEL Input Pulldown
Clock select input. When HIGH, selects CLK1.
When LOW, selects CLK0. LVCMOS / LVTTL interface levels.
2V
DD
Power Positive supply pin.
3, 4 CLK0, CLK1 Input Pullup Single-ended clock inputs. LVCMOS/LVTTL interface levels.
5 DIV_SELA Input Pulldown
Controls frequency division for Bank A outputs. See Table 3
LVCMOS/LVTTL interface levels.
6 DIV_SELB Input Pulldown
Controls frequency division for Bank B outputs. See Table 3.
LVCMOS/LVTTL interface levels.
7 DIV_SELC Input Pulldown
Controls frequency division for Bank C outputs. See Table 3.
LVCMOS/LVTTL interface levels.
8, 11, 15, 20,
24, 27, 31
GND Power Power supply ground.
9, 13, 17 V
DDC
Power Output supply pins for Bank C outputs.
10, 12,
14, 16
QC0, QC1,
QC2, QC3
Output
Single-ended Bank C clock outputs. LVCMOS/LVTTL interface levels.
7 typical output impedance.
18, 22 V
DDB
Power Output supply pins for Bank B outputs.
19,
21, 23
QB2,
QB1, QB0
Output
Single-ended Bank B clock outputs. LVCMOS/LVTTL interface levels.
7 typical output impedance.
25, 29 V
DDA
Power Output supply pins for Bank A outputs.
26,
28, 30
QA2,
QA1, QA0
Output
Single-ended Bank A clock outputs. LVCMOS/LVTTL interface levels.
7 typical output impedance.
32 MR/nOE Input Pulldown
Active HIGH Master Reset. Active LOW Output Enable. When logic HIGH,
the internal dividers are reset and the outputs are (High-Impedance). When
logic LOW, the internal dividers and the outputs are enabled. See Table 3.
LVCMOS/LVTTL interface levels.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4pF
C
PD
Power Dissipation Capacitance
V
DD
= V
DDA
= V
DDB
= V
DDC
= 3.6V
25 pF
R
PULLUP
Input Pullup Resistor 51 k
R
PULLDOWN
Input Pulldown Resistor 51 k
R
OUT
Output Impedance 7
3©2016 Integrated Device Technology, Inc. Revision C, September 19, 2016
87946I-147 Datasheet
Function Tables
Table 3. Clock Input Function Table
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress
specifications only. Functional operation of the product at these conditions or any conditions beyond those listed in the DC Characteristics or
AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics, V
DD
= V
DDA
= V
DDB
= V
DDC
= 3.3V ± 0.3V, T
A
= -40°C to 85°C
Inputs Outputs
MR/nOE DIV_SELA DIV_SELB DIV_SELC QA0:QA2 QB0:QB2 QC0:QC3
1 X X X High-Impedance High-Impedance High-Impedance
00XXf
IN
/1 Active Active
01XXf
IN
/2 Active Active
0 X 0 X Active f
IN
/1 Active
0 X 1 X Active f
IN
/2 Active
0 X X 0 Active Active f
IN
/1
0 X X 1 Active Active f
IN
/2
Item Rating
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5V
Outputs, V
O
-0.5V to V
DDX
+ 0.5V
Package Thermal Impedance,
JA
47.9C/W (0 lfpm)
Storage Temperature, T
STG
-65C to 150C
Junction Temperature 125°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Positive Supply Voltage 3.0 3.3 3.6 V
V
DDA,
V
DDB,
V
DDC
Output Supply Voltage 3.0 3.3 3.6 V
I
DD
Power Supply Current 55 mA
I
DDA
, I
DDB
, I
DDC
Output Supply Current 23 mA
P1-P3P4-P6P7-P9P10-P12P13-P14

87946AYI-147LF

Mfr. #:
Buy 87946AYI-147LF
Manufacturer:
IDT
Description:
Clock Generators & Support Products 10 LVCMOS OUT BUFFER/DIVIDER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet