7©2016 Integrated Device Technology, Inc. Revision C, September 19, 2016
87946I-147 Datasheet
Table 5B. AC Characteristics, V
DD
= 3.3V ± 5%, V
DDA
= V
DDB
= V
DDC
= 2.5V ± 5%, T
A
= -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE 1: Measured from V
DD
/2 of the input to V
DDX
/2 of the output.
NOTE 2: Defined as skew within a bank of outputs at the same supply voltage and with equal load conditions.
NOTE 3: Defined as skew across banks of outputs at the same supply voltage and with equal load conditions. Measured at V
DDX
/2.
NOTE 4: Defined as skew across banks of outputs operating at different frequencies with the same supply voltage and equal load conditions.
NOTE 5: Defined as skew between outputs on different devices operating at the same supply voltage and with equal load conditions. Using
the same type of inputs on each device, the outputs are measured at V
DDX
/2.
NOTE 6: These parameters are guaranteed by characterization. Not tested in production.
NOTE 7: This parameter is defined in accordance with JEDEC Standard 65.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 250 MHz
t
PD
Propagation Delay;
NOTE 1
ƒ 250MHz 2 5 ns
tsk(b) Bank Skew, NOTE 2, 7 Measured on rising edge at V
DDX
/2 35 ps
tsk(o) Output Skew; NOTE 3, 7 Measured on rising edge at V
DDX
/2 175 ps
tsk(w)
Multiple Frequency Skew;
NOTE 4, 7
Measured on rising edge at V
DDX
/2 200 ps
tsk(pp)
Part-to-Part Skew;
NOTE 5, 7
Measured on rising edge at V
DDX
/2 875 ps
t
R
/ t
F
Output Rise/Fall Time; NOTE 6 20% to 80% 400 950 ps
t
PW
Output Pulse Width t
PERIOD
/2 - 1 t
PERIOD
/2 t
PERIOD
/2 + 1 %
t
EN
Output Enable Time;
NOTE 6
ƒ = 10MHz 3 ns
t
DIS
Output Disable Time; NOTE 6 ƒ = 10MHz 3 ns
8©2016 Integrated Device Technology, Inc. Revision C, September 19, 2016
87946I-147 Datasheet
Parameter Measurement Information
3.3V Core/3.3V Output Load AC Test Circuit
Output Skew
Bank Skew
3.3V Core/2.5V Output Load AC Test Circuit
Part-to-Part Skew
Multiple Frequency Skew
SCOPE
Qx
GND
1.65V±0.15V
-1.65V±0.15V
V
DD,
V
DDA,
V
DDB,
V
DDC
tsk(o)
V
DDO
2
V
DDO
2
Qx
Qy
tsk(b)
V
DDx
2
V
DDx
2
Where X = Bank A, B or C
QX0:QXx
QX0:QXx
SCOPE
Qx
GND
-1.25V± 5%
V
DD
1.25V± 5%
2.05V± 5%
V
DDA,
V
DDB,
V
DDC
tsk(pp)
V
DDO
2
V
DDO
2
Part 1
Part 2
Qx
Qy
tsk(ω)
QBx, QCx
QAx
9©2016 Integrated Device Technology, Inc. Revision C, September 19, 2016
87946I-147 Datasheet
Parameter Measurement Information, continued
t
PW
& t
PERIOD
Output Rise/Fall Time
Propagation Delay
QAx,
QBx, QCx
20%
80%
80%
20%
t
R
t
F
QAx,
QBx, QCx
t
PD
V
DDx
2
V
DDx
2
CLK0, CLK1
QAx,
QBx, QCx

87946AYI-147LF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products 10 LVCMOS OUT BUFFER/DIVIDER
Lifecycle:
New from this manufacturer.
Delivery:
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