March 2005 15 MIC2584/2585
MIC2584/2585 Micrel
Functional Description
Hot Swap Insertion
When circuit boards are inserted into live system backplanes
and supply voltages, high inrush currents can result due to
the charging of bulk capacitance that resides across the
supply pins of the circuit board. This inrush current, although
transient in nature, may be high enough to cause permanent
damage to on-board components or may cause the system’s
supply voltages to go out of regulation during the transient
period which may result in system failures. The MIC2584 and
MIC2585 act as a controller for external N-Channel MOSFET
devices in which the gate drive is controlled to provide inrush
current limiting and output voltage slew rate control during hot
swap insertions.
Power Supply
VCC1 is the main supply input to the MIC2584/85 controller
with a voltage range of 2.3V to 13.2V. The VCC2 supply input
ranges from 1.0V to 13.2V and must be less than or equal to
VCC1 for operation. Both inputs can withstand transient
spikes up to 20V. In order to ensure stability of the supplies,
a minimum 1µF capacitor from each VCC to ground is
recommended. Alternatively, a low pass filter, shown in the
typical application circuit, can be used to eliminate high
frequency oscillations as well as help suppress transient
spikes.
Also, due to the existence of undetermined parasitic induc-
tance in the absence of bulk capacitance, placing a Zener
diode at each VCC of the controller to ground in order to
provide external supply transient protection is strongly rec-
ommended. See the typical application circuit in Figure 1.
Start-Up Cycle
Supply Contact Delay
During a hot insert of a PC board into a backplane or when the
main supply (VCC1) is powered up from a cold start, as the
voltage at the ON pin rises above its threshold (1.235V
typical), the MIC2584/85 first checks that both supply volt-
ages are above their respective UVLO thresholds. If so, then
the device is enabled and an internal 2.5µA current source
begins charging capacitor C
POR
to 0.3V to initiate a start-up
sequence. Once the start-up delay (t
START
) elapses, the
CPOR pin is pulled immediately to ground and a separate
14µA current source begins charging each GATE output to
drive the external MOSFET that switches V
IN
to V
OUT
. The
programmed contact start-up delay is calculated using the
following equation:
tC
V
I
0.12 C ( F)
START POR
START
CPOR
POR
=× ≅× µ
(1)
where the start-up delay timer threshold (V
START
) is 0.3V,
and the Power-On Reset timer current (I
CPOR
) is 2.5µA. See
Table 2 for some typical supply contact start-up delays using
several standard value capacitors. As each GATE voltage
continues ramping toward its final value (V
CC
+ V
GS
) at a
defined slew rate (See Load Capacitance/Gate Capacitance
Dominated Start-Up sections), a second CPOR timing cycle
begins if: 1)/FAULT is high and 2)CFILTER is low (i.e., not an
overvoltage, undervoltage lockout, or overcurrent state).
This second timing cycle (t
POR
) begins when the lagging
voltage exceeds its FB pin threshold (V
FB
). See Figure 4 in
the "
Timing Diagrams
". When the power supply is already
present (i.e., not a “hot swapping” condition) and the MIC2584/
85 device is enabled by applying a logic high signal at the ON
pin, the GATE outputs begin ramping immediately as the first
CPOR timing cycle is bypassed. Active current regulation is
employed to limit the inrush current transient response during
start-up by regulating the load current at the programmed
current limit value (See "
Current Limiting and Dual-Level
Circuit Breaker
" section). The following equation is used to
determine the nominal current limit value:
I
V
R
50mV
R
LIM
TRIPSLOW
SENSE SENSE
==
(2)
where V
TRIPSLOW
is the current limit slow trip threshold found
in the electrical table and R
SENSE
is the selected value that
will set the desired current limit. There are two basic start-up
modes for the MIC2584/85: 1)Start-up dominated by load
capacitance and 2)start-up dominated by total gate capaci-
tance. The magnitude of the inrush current delivered to the
load will determine the dominant mode. If the inrush current
is greater than the programmed current limit (I
LIM
), then load
capacitance is dominant. Otherwise, gate capacitance is
dominant. The expected inrush current may be calculated
using the following equation:
INRUSH I
C
C
14 A
C
C
GATE
LOAD
GATE
LOAD
GATE
≅× ≅µ×
(3)
where I
GATE
is the GATE pin pull-up current, C
LOAD
is the
load capacitance, and C
GATE
is the total GATE capacitance
(C
ISS
of the external MOSFET and any external capacitor
connected from the MIC2584/85 GATE pin to ground).
Load Capacitance Dominated Start-Up
In this case, the load capacitance (C
LOAD
) is large enough to
cause the inrush current to exceed the programmed current
limit but is less than the fast-trip threshold (or the fast-trip
threshold is disabled, ‘M’ option). During start-up under this
condition, the load current is regulated at the programmed
current limit value (I
LIM
) and held constant until the output
voltage rises to its final value. The output slew rate and
equivalent GATE voltage slew rate is computed by the
following equation:
Output Voltage Slew Rate dV /dt
I
C
OUT
LIM
LOAD
, =
(4)
where I
LIM
is the programmed current limit value. Conse-
quently, the value of C
FILTER
must be selected to ensure that
the overcurrent response time, t
OCSLOW
, exceeds the time
needed for the output to reach its final value. For example,
given a MOSFET with an input capacitance C
ISS
= C
GATE
=
2000pF, C
LOAD
is 1000µF, and I
LIM
is set to 5A with a 12V
input, then the load capacitance dominates as determined by
the calculated INRUSH > I
LIM
. Therefore, the output voltage
slew rate determined from Equation 4 is:
Output Voltage Slew Rate, (dV /dt)
5A
100 F
V
ms
OUT
=
µ
= 5
