MIC2584/2585 Micrel
MIC2584/2585 16 March 2005
and the resulting t
OCSLOW
needed to achieve a 12V output is
approximately 2.5ms. (See "
Power-On Reset, Overcurrent
Timer, and Sequenced Output Delays
" section to calculate
t
OCSLOW
).
GATE Capacitance Dominated Start-Up
In this case, the value of the load capacitance relative to the
GATE capacitance is small enough such that during start-up
the output current never exceeds the current limit threshold
as determined by Equation 3. The minimum value of C
GATE
that will ensure that the current limit is never exceeded is
given by the equation below:
C (Min)
I
I
C
GATE
GATE
LIMIT
LOAD
Where C
GATE
is the summation of the MOSFET input capaci-
tance (C
ISS
) specification and the value of the capacitor
connected to the GATE pin of the MIC2584/85 (and MOSFET)
to ground. Once C
GATE
is determined, use the following
equation to determine the output slew rate
dV
OUT
/dt for gate capacitance dominated start-up:
dV /dt
I
C
OUT
GATE
GATE
=
Table 1 depicts the output slew rate for various values of C
GATE
.
I
GATE
= 14µA
C
GATE
dV
OUT
/dt
0.001µF 14V/ms
0.01µF 1.4V/ms
0.1µF 0.14V/ms
1µF 0.014V/ms
Table 1. Output Slew Rate Selection for GATE
Capacitance Dominated Start-Up
Current Limiting and Dual-Level Circuit Breaker
Many applications will require that the inrush and steady state
supply current be limited at a specific value in order to protect
critical components within the system. Connecting a sense
resistor between the VCC and SENSE pins of each channel
sets the nominal current limit value for each channel of the
MIC2584/85 and the current limit is calculated using
Equation 2.
The MIC2584/85 also features a dual-level circuit breaker
triggered via 50mV and 100mV current limit thresholds sensed
across the VCC and SENSE pins. The first level of the circuit
breaker functions as follows. For the MIC2584/85, once the
voltage sensed across these two pins exceeds 50mV on
either channel, the overcurrent timer, its duration set by
capacitor C
FILTER
, starts to ramp the voltage at CFILTER
using a 2.5µA constant current source. If the voltage at
CFILTER reaches the overcurrent timer threshold (V
TMR
) of
1.235V, then CFILTER immediately returns to ground as the
circuit breaker trips and both GATE outputs are immediately
shut down. For the second level, if the voltage sensed across
VCC and SENSE of either channel exceeds 100mV
(J option) at any time, the circuit breaker trips and both
GATE outputs shut down immediately, bypassing the
overcurrent timer period. To disable current limit and circuit
breaker operation, tie each channels SENSE and VCC pins
together and the CFILTER pin to ground.
Output Undervoltage Detection
The MIC2584/85 employ output undervoltage detection by
monitoring the output voltage through a resistive divider
connected at the FB pins. During turn on, while the voltage at
either FB pin is below its threshold (V
FB
), the /POR pin is
asserted low. Once both FB pin voltages cross their respec-
tive threshold (V
FB
), a 2.5µA current source charges capaci-
tor C
POR
. Once the CPOR pin voltage reaches 1.235V, the
time period t
POR
elapses as pin CPOR is pulled to ground and
the /POR pin goes HIGH. If the voltage at either FB drops
below V
FB
for more than 10µs, the /POR pin resets for at least
one timing cycle defined by t
POR
(See "
Applications Informa-
tion
" for an example).
Input/Output Overvoltage Protection
The MIC2585 monitors and detects overvoltage conditions in
the event of excessive supply transients at the MIC2585
input(s)/output(s). Whenever the voltage threshold is ex-
ceeded at either OV1 or OV2 of the MIC2585, the circuit
breaker is tripped and both GATE outputs are immediately
brought low.
Power-On Reset, Overcurrent Timer, and Sequenced
Output Delays
The Power-On Reset delay, t
POR
, is the time period for the
/POR pin to go HIGH once the lagging voltage exceeds the
power-good threshold (V
FB
) monitored at the FB pin. A
capacitor connected to CPOR sets the interval and is deter-
mined by using Equation 1 with V
POR
substituted for V
START
.
The resulting equation becomes:
tC
V
I
0.5 C F
POR POR
POR
CPOR
POR
×µ
()
(7)
where the Power-On Reset threshold (V
POR
) and timer
current (I
CPOR
) are typically 1.235V and 2.5µA, respectively.
For the MIC2584/85, a capacitor connected to CFILTER is
used to set the timer which activates the circuit breaker during
overcurrent conditions. When the voltage across either sense
resistor exceeds the slow trip current limit threshold of 50mV,
the overcurrent timer begins to charge for a period, t
OCSLOW
,
determined by C
FILTER
. If t
OCSLOW
elapses, then the circuit
breaker is activated and both GATE outputs are immediately
pulled to ground. The following equation is used to determine
the overcurrent timer period, t
OCSLOW
.
tC
V
I
0.5 C ( F)
OCSLOW
FILTER
TMR
TMR
FILTER
×µ
(8)
where V
TMR
, the overcurrent timer threshold, is 1.235V and
I
TMR
, the overcurrent timer current, is 2.5µA. If no capacitor
for CFILTER is used, then t
OCSLOW
defaults to 20µs.
March 2005 17 MIC2584/2585
MIC2584/2585 Micrel
The sequenced output feature is enabled for the MIC2585 by
placing a capacitor from CDLY to ground. The 1 option
allows for V
OUT2
to follow V
OUT1
and the 2 option allows for
V
OUT1
to follow V
OUT2
during start-up (See "
Timing Dia-
grams, Figure 5
"). The sequenced output delay time is
determined using the following equation:
tC
V
I
0.2 C ( F)
DLY DLY
DELAY
DELAY
DLY
≅× ×µ
(9)
where V
DELAY
, the CDLY pin threshold, is typically 1.235V,
I
DELAY
, the CDLY pin charge current, is typically 6µA, and
C
DLY
is the capacitor connected to CDLY. Tables 2, 3, and 4
provide a quick reference for several timer calculations using
select standard value capacitors.
Undervoltage Lockout
Internal circuitry keeps both GATE output charge pumps off
until VCC1 and VCC2 exceed 2.165V and 0.8V, respectively.
C
POR
t
START
t
POR
0.01µF 1.2ms 5ms
0.033µF 4ms 16.5ms
0.05µF 6ms 25ms
0.1µF 12ms 50ms
0.33µF 40ms 165ms
0.47µF 56ms 235ms
1µF 120ms 500ms
Table 2. Selected Power-On Reset and
Start-Up Delays
C
FILTER
t
OCSLOW
220pF 110µs
680pF 340µs
1000pF 500µs
3300pF 1.6ms
0.01µF 5ms
0.047µF 23.5ms
0.1µF 50ms
0.33µF 165ms
Table 3. Selected Overcurrent Timer Delays
C
DLY
t
DLY
4700pF 950µs
0.01µF 2ms
0.047µF 9.5ms
0.1µF 20ms
0.33µF 66ms
0.82µF 165ms
1µF 200ms
2.2µF 440ms
Table 4. Selected Sequenced Output Delays
MIC2584/2585 Micrel
MIC2584/2585 18 March 2005
C6
0.1µF
R1
47k
SENSE1
VCC1
R
SENSE1
0.007
5%
1
34
24 23
SENSE2
VCC2
R
SENSE2
0.015
5%
12
34
12
C4
0.022µF
**Q2
Si4922DY (1)
(SO-8)
C
LOAD1
1500µF
V
OUT1
5V@5A
V
OUT2
1.8V@2A
C
LOAD2
100µF
C3
0.022µF
**Q1
Si4922DY (2)
(SO-8)
GND
3
5
9
7
22
20
18
13
GATE2
OUT2
TRK
OUT1
FB2
FB1
GATE1
CDLY
12
CFILTER
11
ON
8
Undervoltage (OUT1) = 4.4V
Undervoltage (OUT2) = 1.5V
Circuit Breaker Response Time = 5ms
Sequenced Output Delay = 20ms
*Diodes are BZX84C(x)V(x)
**Si4922DY is a dual Power MOSFET
Additional pins omitted for clarity
C5
0.01µF
C2
1µF
R5
10.5k
1%
R3
15.8k
1%
R2
39.2k
1%
R4
8.06k
1%
*D1
(8V)
*D2
(6V)
C1
1µF
MIC2585-1
V
IN1
5V
V
IN2
1.8V
Figure 6. Output Sequencing/Tracking Combination
Applications Information
Output Tracking and Sequencing
The MIC2585 is equipped with optional supply
settings: Tracking or Sequencing. There are many applica-
tions that require two supplies to track one another within a
specified maximum potential difference (or time) during power-
up and power-down, such as in switching a processor on and
off. In many other systems and applications, supply sequenc-
ing during turn-on may be essential such as when a specific
circuit block (e.g., a system clock) requires available power
before another block of system circuitry. For either supply
configuration, the MIC2585 requires only one additional
component and can be used as an integrated solution to
traditional, and most often complex, discrete circuit solutions.
Additionally, the two optional supply settings may be com-
bined to provide supply sequencing during start-up and
supply tracking during turn-off (see Figure 6 below). The
MIC2585 guarantees supply tracking within 250mV for power-
up and power-down independent of the load capacitance of
each supply. See "
Figure 2
" of the "
Timing Diagrams
".
Wiring the TRK pin to either OUT1 or OUT2 of the MIC2585
enables the tracking feature. The OUT1 and OUT2 pins
provide output track sensing and are wired directly to the
output (source) of the external MOSFET for Channel 1 and
Channel 2, respectively.
The MIC2584/85 can also be used in systems that support
more than two supplies. Figure 7 illustrates the generic use
of two separate controllers configured to support four inde-
pendent supply rails with an associated output timing re-
sponse. The PG (or /POR) output of the first controller is used
to enable the second controller. As configured, a fault condi-
tion on either V
OUT1
or V
OUT2
will result in all channels being
shut down. For systems with multiple power sequencing
requirements, the controllers output tracking and sequenc-
ing features can be implemented in order to meet the systems
timing demands.

MIC2584-JBTS

Mfr. #:
Manufacturer:
Description:
IC CTRLR HOT SWAP DUAL 16-TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union