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L6731BTR

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
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L6731B Device description
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The output of the error amplifier is clamped with this voltage (Vss) until it reaches the
programmed value. No switching activity is observable if V
SS
is lower than 0.5V and both
MOSFETs are off. When Vss is between 0.5V and 1.1V the low-side MOSFET is turned on
because the comp signal is lower than the valley of the triangular wave and so the duty-cycle is
0%. As V
SS
reaches 1.1V (i.e. the oscillator triangular wave inferior limit) even the high-side
MOSFET begins to switch and the output voltage starts to increase. The L6731B can always
sink or source current. If an over current is detected during the soft-start phase, the device
provides a constant-current-protection. In this way, in case of short soft-start time and/or small
inductor value and/or high output capacitors value and so, in case of high ripple current during
the soft-start, the converter can start in any case, limiting the current (see 5.8: Monitoring and
protections) but not entering in HICCUP mode. During normal operation, if any under-voltage is
detected on one of the two supplies, the SS pin is internally shorted to GND and so the SS
capacitor is rapidly discharged.
5.7 Driver section
The high-side and low-side drivers allow using different types of power MOSFETs (also multiple
MOSFETs to reduce the R
DS(on)
), maintaining fast switching transitions. The low-side driver is
supplied by V
CCDR
while the high-side driver is supplied by the BOOT pin. A predictive dead
time control avoids MOSFETs cross-conduction maintaining very short dead time duration in
the range of 20ns. The control monitors the phase node in order to sense the low-side body
diode recirculation. If the phase node voltage is less than a certain threshold (-350mV typ.)
during the dead time, it will be reduced in the next PWM cycle. The predictive dead time control
doesn’t work when the high-side body diode is conducting because the phase node doesn’t go
negative. This situation happens when the converter is sinking current for example and, in this
case, an adaptive dead time control operates.
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Device description L6731B
14/24
5.8 Monitoring and protections
The output voltage is monitored by means of pin FB. If it is not within ±10% (typ.) of the
programmed value, the Power-Good (PGOOD) output is forced low. The device provides over-
voltage-protection: when the voltage sensed on FB pin reaches a value 20% (typ.) greater than
the reference, the low-side driver is turned on as long as the over voltage is detected (see
Figure 7.).
It must be taken into account that there is an electrical network between the output terminal and
the FB pin and therefore the voltage at the pin is not a perfect replica of the output voltage.
However due to the fact that the converter can sink current, in the most of cases the low-side
will turn-on before the output voltage exceeds the over-voltage threshold, because the error
amplifier will throw off balance in advance. Even if the device doesn't report an over-voltage, the
behavior is the same, because the low-side is turned-on immediately. The following figure
shows the device behavior during an over-voltage event. The output voltage rises with a slope
of 100mV/µs, emulating in this way the breaking of the high-side MOSFET as an over-voltage
cause.
Figure 7. OVP
LGate
FB
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L6731B Device description
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The device realizes the over-current-protection (OCP) sensing the current both on the high-
side MOSFET(s) and the low-side MOSFET(s) and so 2 current limit thresholds can be set (see
OCH pin and OCL pin in Table 3. Pins function):
● Peak Current Limit
● Valley Current Limit
The Peak Current Protection is active when the high-side MOSFET(s) is turned on, after a
masking time of about 100ns. The valley-current-protection is enabled when the low-side
MOSFET(s) is turned on after a masking time of about 400ns. If, when the soft-start phase is
completed, an over current event occurs during the on time (peak-current-protection) or during
the off time (valley-current-protection) the device enters in HICCUP mode: the high-side and
low-side MOSFET(s) are turned off, the soft-start capacitor is discharged with a constant
current of 10µA and when the voltage at the SS pin reaches 0.5V the soft-start phase restarts.
During the soft-start phase the OCP provides a constant-current-protection. If during the T
ON
the OCH comparator triggers an over current the high-side MOSFET(s) is immediately turned
off (after the masking time and the internal delay) and returned on at the next pwm cycle. The
limit of this protection is that the T
ON
can't be less than masking time plus propagation delay
because during the masking time the peak-current-protection is disabled. In case of very hard
short circuit, even with this short T
ON
, the current could escalate. The valley-current-protection
is very helpful in this case to limit the current. If during the off-time the OCL comparator triggers
an over current, the high-side MOSFET(s) is not turned on until the current is over the valley-
current-limit. This implies that, if it is necessary, some pulses of the high-side MOSFET(s) will
be skipped, guaranteeing a maximum current due to the following formula:
In constant current protection a current control loop limits the value of the error amplifier output
(comp), in order to avoid its saturation and thus recover faster when the output returns in
regulation. Figure 9. shows the behaviour of the device during an over current condition that
persists also in the soft-start phase.
Figure 8. OVP: the low-side MOSFET is turned-on in advance.
V
OUT
V
FB
LGate
109%
MINONVALLEYMAX
T
L
VoutVin
II
,
⋅
+=
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L6731BTR

Mfr. #:
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Manufacturer:
STMicroelectronics
Description:
IC REG CTRLR DDR 1OUT 16HTSSOP
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