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ADG1434YRUZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
4 Ω R
ON
, Triple/Quad SPDT
±15 V/+12 V/±5 V iCMOS Switches
Data Sheet
ADG1433/ADG1434
Rev. E Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2006–2016 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
4.7 Ω maximum on resistance at 25°C
0.5 Ω on-resistance flatness
Fully specified at ±15 V/+12 V/±5 V
3 V logic-compatible inputs
Up to 115 mA continuous current per channel
Rail-to-rail operation
Break-before-make switching action
16-/20-lead TSSOP and 4 mm × 4 mm LFCSP
APPLICATIONS
Relay replacement
Audio and video routing
Automatic test equipment
Data acquisition systems
Temperature measurement systems
Avionics
Battery-powered systems
Communication systems
Medical equipment
GENERAL DESCRIPTION
The ADG1433 and ADG1434 are monolithic industrial CMOS
(iCMOS®) analog switches comprising three independently
selectable single-pole, double-throw (SPDT) switches and
four independently selectable SPDT switches, respectively.
All channels exhibit break-before-make switching action that
prevents momentary shorting when switching channels. An
EN
input on the ADG1433 (LFCSP and TSSOP) and ADG1434
(LFCSP only) enables or disables the device. When disabled, all
channels are switched off.
The iCMOS modular manufacturing process combines high
voltage, complementary metal-oxide semiconductor (CMOS),
and bipolar technologies. It enables the development of a wide
range of high performance analog ICs capable of 33 V operation
in a footprint that no other generation of high voltage devices
has been able to achieve. Unlike analog ICs using a conventional
CMOS process, iCMOS components can tolerate high supply
voltages while providing increased performance, dramatically
lower power consumption, and reduced package size.
The ultralow on resistance and on resistance flatness of these
switches make them ideal solutions for data acquisition and gain
switching applications, where low distortion is critical. iCMOS
construction ensures ultralow power dissipation, making the
devices ideally suited for portable and battery-powered
instruments.
FUNCTIONAL BLOCK DIAGRAMS
IN1 IN2 IN3 EN
S1A
D1
S1B
S2B
D2
S2A
S3B
D3
S3A
LOGIC
ADG1433
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
06181-001
Figure 1. ADG1433 TSSOP and LFCSP
S1
A
D1
S1B
IN1
IN2
S2B
S2
A
D2
S4A
D4
S4B
IN4
IN3
S3B
S3A
D3
ADG1434
SWITCHES SHOWN FOR
A
1 INPUT LOGIC.
06181-002
Figure 2. ADG1434 TSSOP
06181-101
S1A
D1
S1B
S2B
S2A
D2
S4A
D4
S4B
S3B
S3A
D3
ADG1434
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
IN1
IN2 IN3 IN4 EN
LOGIC
Figure 3. ADG1434 LFCSP
ADG1433/ADG1434 Data Sheet
Rev. E | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
±15 V Dual Supply ....................................................................... 3
12 V Single Supply ........................................................................ 5
±5 V Dual Supply ......................................................................... 6
Absolute Maximum Ratings ............................................................7
Thermal Resistance .......................................................................7
ESD Caution...................................................................................7
Pin Configurations and Function Descriptions ............................8
Typical Performance Characteristics ........................................... 10
Test Circuits ..................................................................................... 13
Terminology .................................................................................... 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 17
REVISION HISTORY
8/2016—Rev. D to Rev. E
Changes to Analog Inputs Parameter and Digital Inputs
Parameter, Table 4.............................................................................. 7
3/2016—Rev. C to Rev. D
Changed CP-20-4 to CP-20-10 and CP-16-13 to
CP-16-26 ......................................................................... Throughout
Changes to Figure 5 and Table 6 ..................................................... 8
Changes to Figure 6, Figure 7, and Table 8 ................................... 9
Changes to Figure 27 ...................................................................... 13
Changes to Figure 31, Figure 32, and Figure 33 ......................... 14
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 17
6/2009—Rev. B to Rev. C
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 17
3/2009—Rev. A to Rev. B
Change to I
DD
Parameter, Table 1 .................................................... 4
Change to I
DD
Parameter, Table 2 .................................................... 5
Updated Outline Dimensions, Figure 39 .................................... 17
6/2008—Rev. 0 to Rev. A
Added Continuous Current per Channel Parameter, Table 1 ..... 4
Added Continuous Current per Channel Parameter, Table 2 ..... 5
Added Continuous Current per Channel Parameter, Table 3 ..... 6
Changes to Table 4 ............................................................................. 7
Changes to Figure 30 ...................................................................... 13
Updated Outline Dimensions ....................................................... 16
Changes to Ordering Guide .......................................................... 17
10/2006—Revision 0: Initial Version
Data Sheet ADG1433/ADG1434
Rev. E | Page 3 of 20
SPECIFICATIONS
±15 V DUAL SUPPLY
V
DD
= +15 V ± 10%, V
SS
= –15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1.
Parameter +25°C
−40°C to
+85°C
−40°C to
+125°C
1
Unit Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range V
SS
to V
DD
V
On Resistance, R
ON
4 Ω typ V
S
= ±10 V, I
S
= −10 mA; see Figure 25
4.7 5.7 6.7 Ω max V
DD
= +13.5 V, V
SS
= −13.5 V
On Resistance Match Between 0.5 Ω typ V
S
= ±10 V, I
S
= −10 mA
Channels, ΔR
ON
0.78 0.85 1.1 Ω max
On Resistance Flatness, R
FL AT(ON)
0.5 Ω typ V
S
= ±10 V, I
S
= −10 mA
0.72 0.77 0.92 Ω max
LEAKAGE CURRENTS V
DD
= +16.5 V, V
SS
= −16.5 V
Source Off Leakage, I
S
(Off)
±0.04
nA typ
V
D
= ±10 V, V
S
= ±10 V; see Figure 26
±0.3 ±0.6 ±3 nA max
Drain Off Leakage, I
D
(Off) ±0.04 nA typ V
D
= ±10 V, V
S
= ±10 V; see Figure 26
±0.3 ±0.6 ±3 nA max
Channel On Leakage, I
D
, I
S
(On) ±0.05 nA typ V
S
= V
D
= ±10 V; see Figure 27
±0.4 ±0.8 ±8 nA max
DIGITAL INPUTS
Input High Voltage, V
IH
2.0 V min
Input Low Voltage, V
IL
0.8 V max
Input Current, I
IL
or I
IH
±0.005
µA typ
V
IN
= V
GND
or V
DD
±0.1 µA max
Digital Input Capacitance, C
IN
3 pF typ
DYNAMIC CHARACTERISTICS
2
Transition Time, t
TRANS
140 ns typ R
L
= 100 Ω, C
L
= 35 pF
170 200 230 ns max V
S
= 10 V, see Figure 28
Break-Before-Make Time Delay, t
D
40 ns typ R
L
= 100 Ω, C
L
= 35 pF
30 ns min V
S1
= V
S2
= 10 V, see Figure 29
t
ON
(
EN
) 140 ns typ R
L
= 100 Ω, C
L
= 35 pF
170 200 230 ns max V
S
= 10 V, see Figure 30
t
OFF
(
EN
) 60 ns typ R
L
= 100 Ω, C
L
= 35 pF
75 85 90 ns max V
S
= 10 V, see Figure 30
Charge Injection −50 pC typ V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF, see Figure 31
Off Isolation −70 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz, see Figure 32
Channel-to-Channel Crosstalk −70 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz, see Figure 34
Total Harmonic Distortion, THD + N 0.025 % typ R
L
= 110 Ω, 15 V p-p, f = 20 Hz to 20 kHz, see
Figure 35
−3 dB Bandwidth 200 MHz typ R
L
= 50 Ω, C
L
= 5 pF, see Figure 33
Insertion Loss 0.24 dB typ R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz, see Figure 33
C
S
(Off)
12
pF typ
f = 1 MHz
C
D
(Off) 22 pF typ f = 1 MHz
C
D
, C
S
(On) 72 pF typ f = 1 MHz
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

ADG1434YRUZ

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Analog Switch ICs IC 70dB 4 Ohm Quad SPDT iCMOS
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