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CAT5172TBI-50GT3

P1-P3P4-P6P7-P9P10-P10
Semiconductor Components Industries, LLC, 2013
July, 2013 − Rev. 1
1 Publication Order Number:
CAT5172/D
CAT5172
256‐position SPI
Compatible Digital
Potentiometer (POT)
The CAT5172 is a 256-position digital linear taper potentiometer
ideally suited for replacing mechanical potentiometers and variable
resistors. Like mechanical potentiometers, the CAT5172 has a
resistive element, which can span V
CC
to Ground or float anywhere
between the power supply rails.
Wiper settings are controlled through an SPI-compatible digital
interface. Upon power-up, the wiper assumes a mid-span position and
may be repositioned anytime after the power is stable.
The CAT5172 operates from 2.7 V to 5.5 V, while consuming less
than 2 mA. This low operating current, combined with a small package
footprint, make the CAT5172 ideal for battery-powered portable
appliance.
Features
256-position
End-to-End Resistance: 50 kW, 100 kW
SPI Compatible Interface
Power-on Preset to Midscale
Single Supply 2.7 V to 5.5 V
Low Temperature Coefficient 100 ppm/C
Low Power, I
DD
2 mA max
Wide Operating Temperature −40C to +85C
SOT−23 8-lead (2.9 mm 3 mm) Package
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Potentiometer Replacement
Transducer Adjustment of Pressure, Temperature, Position,
Chemical, and Optical Sensors
RF Amplifier Biasing
Gain Control and Offset Adjustment
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PIN CONNECTIONS
SDI
CS
B
A
CLK
GND
V
DD
W
1
(Top View)
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
SOT23−8
TB SUFFIX
CASE 527AK
AD = 50 kW
AE = 100 kW
Y = Production Year
Y = (Last Digit)
M = Production Month
M = (1 − 9, A, B, C)
ADYM
MARKING DIAGRAM
1
AEYM
1
CAT5172
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2
SPI
INTERFACE
WIPER
REGISTER
CLK
A
B
W
SDI
GND
Figure 1. Functional Block Diagram
V
DD
CS
Table 1. ORDERING INFORMATION
Part Number Resistance Temperature Range Package Shipping
†
CAT5172TBI−50GT3
50 kW
−40C to 85C
SOT−23−8
(Pb−Free)
3000/Tape & Reel
CAT5172TBI−00GT3
100 kW
3000/Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
1. For detailed information and a breakdown of device nomenclature and numbering systems, please see the ON Semiconductor Device
Nomenclature document, TND310/D, available at www.onsemi.com
.
Table 2. PIN FUNCTION DESCRIPTION
Pin No. Pin Name Description
1 W Resistor’s Wiper Terminal.
2 V
DD
Positive Power Supply.
3 GND Digital Ground.
4 CLK Serial Clock Input. Positive edge triggered.
5 SDI Serial Data Input.
6 CS Chip Select Input, Active Low. When CS returns high, data will be loaded into the DAC register.
7 B Bottom Terminal of resistive element.
8 A Top Terminal of resistive element.
Table 3. ABSOLUTE MAXIMUM RATINGS (Note 2)
Rating Value Unit
V
DD
to GND −0.3 to 6.5 V
V
A
, V
B
, V
W
to GND V
DD
I
MAX
20 mA
Digital Inputs and Output Voltage to GND 0 to 6.5 V
Operating Temperature Range −40 to +85 C
Maximum Junction Temperature (T
JMAX
) 150 C
Storage Temperature −65 to +150 C
Lead Temperature (Soldering, 10 sec) 300 C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. Maximum terminal current is bounded by the maximum current handling of the switches, maximum power dissipation of the package, and
maximum applied voltage across any two of the A, B, and W terminals at a given resistance.
CAT5172
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3
Table 4. ELECTRICAL CHARACTERISTICS: 50 kW and 100 kW Versions
V
DD
= 5 V 10%, or 3 V 10%; V
A
= V
DD
; V
B
= 0 V; –40C < T
A
< +85C; unless otherwise noted.
Parameter
Test Conditions Symbol Min
Typ
(Note 3)
Max Unit
DC CHARACTERISTICS − RHEOSTAT MODE
Resistor Differential Nonlinearity (Note 4)
R
WB
, V
A
= no connection R−DNL −1 0.1 +1 LSB
Resistor Integral Nonlinearity (Note 4) R
WB
, V
A
= no connection R−INL −2 0.4 +2 LSB
Nominal Resistor Tolerance (Note 5) T
A
= 25C nR
AB
−20 +20 %
Resistance Temperature Coefficient V
AB
= V
DD
, Wiper = no connection nR
AB
/nT 100 ppm/C
Wiper Resistance
V
DD
= 5 V
R
W
50 120 W
V
DD
= 3 V 100 250
DC CHARACTERISTICS − POTENTIOMETER DIVIDER MODE
Resolution
N 8 Bits
Differential Nonlinearity (Note 6) DNL −1 0.1 +1 LSB
Integral Nonlinearity (Note 6) INL −1 0.4 +1 LSB
Voltage Divider Temperature Coefficient Code = 0x80 nV
W
/nT 100 ppm/C
Full-Scale Error Code = 0xFF V
WFSE
−3 −1 0 LSB
Zero-Scale Error Code = 0x00 V
WZSE
0 1 3 LSB
RESISTOR TERMINALS
Voltage Range (Note 7)
V
A,B,W
GND V
DD
V
Capacitance (Note 8) A, B f = 1 MHz, measured to GND,
Code = 0 x 80
C
A,B
45 pF
Capacitance (Note 8) W f = 1 MHz, measured to GND,
Code = 0 x 80
C
W
60 pF
Common-Mode Leakage (Note 8) V
A
= V
B
= V
DD
/2 I
CM
1 nA
DIGITAL INPUTS
Input Logic High
V
DD
= 5 V V
IH
0.7 x V
DD
V
Input Logic Low V
DD
= 5 V V
IL
0.3V
DD
V
Input Logic High V
DD
= 3 V V
IH
0.7 x V
DD
V
Input Logic Low V
DD
= 3 V V
IL
0.3V
DD
V
Input Current V
IN
= 0 V or 5 V I
IL
1
mA
Input Capacitance (Note 8) C
IL
5 pF
POWER SUPPLIES
Power Supply Range
V
DD
RANGE
2.7 5.5 V
Supply Current V
IH
= 5 V or V
IL
= 0 V I
DD
0.3 2
mA
Power Dissipation (Note 9) V
IH
= 5 V or V
IL
= 0 V, V
DD
= 5 V P
DISS
0.2 mW
Power Supply Sensitivity nV
DD
= +5 V 10%, Code = Midscale PSS 0.05 %/%
3. Typical specifications represent average readings at +25C and V
DD
= 5 V.
4. Resistor position nonlinearity error R−INL is the deviation from an ideal value measured between the maximum resistance and the
minimum resistance wiper positions. R−DNL measures the relative step change from ideal between successive tap positions. Parts are
guaranteed monotonic.
5. V
AB
= V
DD
, Wiper (V
W
) = no connect.
6. INL and DNL are measured at VW with the digital POT configured as a potentiometer divider similar to a voltage output D/A converter.
V
A
= V
DD
and V
B
= 0 V. DNL specification limits of 1 LSB maximum are guaranteed monotonic operating conditions.
7. Resistor terminals A, B, W have no limitations on polarity with respect to each other.
8. Guaranteed by design and not subject to production test.
9. PDISS is calculated from (I
DD
x V
DD
). CMOS logic level inputs result in minimum power dissipation.
10.All dynamic characteristics use V
DD
= 5 V.
P1-P3P4-P6P7-P9P10-P10

CAT5172TBI-50GT3

Mfr. #:
Buy CAT5172TBI-50GT3
Manufacturer:
ON Semiconductor
Description:
Digital Potentiometer ICs Linear Single 256 Taps Non Buffer
Lifecycle:
New from this manufacturer.
Delivery:
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