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100336QCX

P1-P3P4-P6P7-P9P10-P12P13-P14
www.fairchildsemi.com 4
100336
Absolute Maximum Ratings(Note 2) Recommended Operating
Conditions
Note 2: Absolute maximum ratings are those values beyond which the
device may be damaged or have its useful life impaired. Functional opera-
tion under these conditions is not implied.
Note 3: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version
DC Electrical Characteristics
(Note 4)
V
EE
= −4.2V to −5.7V, V
CC
= V
CCA
= GND, T
C
= 0°C to +85°C
Note 4: The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under “worst case” conditions.
Storage Temperature (T
STG
) −65°C to +150°C
Maximum Junction Temperature (T
J
) +150°C
V
EE
Pin Potential to Ground Pin −7.0V to +0.5V
Input Voltage (DC) V
EE
to +0.5V
Output Current (DC Output HIGH)
−50 mA
ESD (Note 3)
≥ 2000V
Case Temperature (T
C
)
Commercial 0
°C to +85°C
Industrial
−40°C to +85°C
Supply Voltage (V
EE
) −5.7V to −4.2V
Symbol Parameter Min Typ Max Units Conditions
V
OH
Output HIGH Voltage −1025 −955 −870 mV V
IN
=V
IH (Max)
Loading with
V
OL
Output LOW Voltage −1830 −1705 −1620 mV or V
IL (Min)
50Ω to −2.0V
V
OHC
Output HIGH Voltage −1035 mV V
IN
= V
IH(Min)
Loading with
V
OLC
Output LOW Voltage −1610 mV or V
IL (Max)
50Ω to −2.0V
V
IH
Input HIGH Voltage −1165 −870 mV Guaranteed HIGH Signal
for All Inputs
V
IL
Input LOW Voltage −1830 −1475 mV Guaranteed LOW Signal
for All Inputs
I
IL
Input LOW Current 0.50 µAV
IN
= V
IL
(Min)
I
IH
Input HIGH Current 240 µAV
IN
= V
IH
(Max)
I
EE
Power Supply Current −165 −80 Inputs Open
5 www.fairchildsemi.com
100336
Commercial Version (Continued)
DIP AC Characteristics
V
EE
= −4.2V to −5.7V, V
CC
= V
CCA
= GND
Note 5: The propagation delay specified is for single output switching. Delays may vary up to 250 ps with multiple outputs switching.
Symbol Parameter
T
C
= 0°CT
C
= +25°CT
C
= +85°C
Units Conditions
MinMaxMinMaxMinMax
f
SHIFT
Shift Frequency 300 300 300 MHz Figures 2, 3
t
PLH
Propagation Delay
1.00 2.00 1.00 2.00 1.00 2.00 ns
Figures 1, 3
t
PHL
CP to Q
n
, Q
n
(Note 5)
t
PLH
Propagation Delay
2.10 3.50 2.10 3.50 2.10 3.70 ns
Figures 1, 7, 8
t
PHL
CP to TC (Shift) (Note 5)
t
PLH
Propagation Delay
2.40 4.40 2.40 4.40 2.60 4.70 ns
Figures 1, 9
t
PHL
CP to TC (Count) (Note 5)
t
PLH
Propagation Delay
1.40 2.50 1.40 2.50 1.50 2.60 ns
Figures 1, 4
t
PHL
MR to Q
n
, Q
n
(Note 5)
t
PLH
Propagation Delay
2.80 5.10 2.90 5.20 3.10 5.50 ns
Figures 1, 12
t
PHL
MR to TC (Count) (Note 5)
t
PHL
Propagation Delay
2.40 4.00 2.40 4.00 2.50 4.10 ns
Figures 1, 10, 11
MR to TC (Shift) (Note 5)
t
PLH
Propagation Delay
1.80 3.10 1.80 3.10 1.90 3.30 ns
t
PHL
D
0
/CET to TC Figures 1, 5
t
PLH
Propagation Delay
1.90 4.10 1.90 4.10 2.10 4.40 ns
(Note 5)
t
PHL
S
n
to TC
t
TLH
Transition Time
0.35 1.20 0.35 1.20 0.35 1.20 ns Figures 1, 3
t
THL
20% to 80%, 80% to 20%
t
S
Setup Time
D
3
1.00 1.00 1.00
P
n
1.50 1.50 1.50
D
0
/CET 1.30 1.30 1.30
ns Figures 6, 4
CEP 1.40 1.40 1.40
S
n
3.40 3.40 3.40
MR (Release Time) 2.60 2.60 2.60
t
H
Hold Time
D
3
0.40 0.40 0.40
P
n
0.30 0.30 0.30
ns Figure 6
D
0
/CET 0.30 0.30 0.30
CEP 0.20 0.20 0.20
S
n
0.10 0.10 0.10
t
PW
(H) Pulse Width HIGH
2.00 2.00 2.00 ns Figures 3, 4
CP, MR
www.fairchildsemi.com 6
100336
SOIC and PLCC AC Electrical Characteristics
V
EE
= −4.2V to −5.7V, V
CC
= V
CCA
= GND
Note 6: The propagation delay specified is for single output switching. Delays may vary up to 250 ps with multiple outputs switching.
Note 7: Output-to-Output Skew is defined as the absolute value of the difference between the actual propagation delay for any outputs within the same pack-
aged device. The specifications apply to any outputs switching in the same direction either HIGH-to-LOW (t
OSHL
), or LOW-to-HIGH (t
OSLH
), or in opposite
directions both HL and LH (t
OST
). Parameters t
OST
and t
ps
guaranteed by design
Symbol Parameter
T
C
= 0°CT
C
= +25°CT
C
= +85°C
Units Conditions
MinMaxMinMaxMinMax
f
SHIFT
Shift Frequency 350 350 350 MHz Figures 2, 3
t
PLH
Propagation Delay
1.00 1.80 1.00 1.80 1.00 1.80 ns
Figures 1, 2
t
PHL
CP to Q
n
, Q
n
(Note 6)
t
PLH
Propagation Delay
2.10 3.30 2.10 3.30 2.10 3.50 ns
Figures 1, 7, 8
t
PHL
CP to TC (Shift) (Note 6)
t
PLH
Propagation Delay
2.40 4.20 2.40 4.20 2.60 4.50 ns
Figures 1, 9
t
PHL
CP to TC (Count) (Note 6)
t
PLH
Propagation Delay
1.40 2.30 1.40 2.30 1.50 2.40 ns
Figures 1, 4
t
PHL
MR to Q
n
, Q
n
(Note 6)
t
PLH
Propagation Delay
2.80 4.90 2.90 5.00 3.10 5.30 ns
Figures 1, 12
t
PHL
MR to TC (Count) (Note 6)
t
PHL
Propagation Delay
2.40 3.80 2.40 3.80 2.50 3.90 ns
Figures 1, 10, 11
MR to TC (Shift) (Note 6)
t
PLH
Propagation Delay
1.80 2.90 1.80 2.90 1.90 3.10 ns
t
PHL
D
0
/CET to TC Figures 1, 5
t
PLH
Propagation Delay
1.90 3.90 1.90 3.90 2.10 4.20 ns
(Note 6)
t
PHL
S
n
to TC
t
TLH
Transition Time
0.35 1.10 0.35 1.10 0.35 1.10 ns Figures 1, 3
t
THL
20% to 80%, 80% to 20%
t
S
Setup Time
D
3
0.90 0.90 0.90
P
n
1.40 1.40 1.40
ns Figures 4, 6
D
0
/CET 1.20 1.20 1.20
CEP 1.30 1.30 1.30
S
n
3.30 3.30 3.30
MR (Release Time) 2.50 2.50 2.50
t
H
Hold Time
D
3
0.30 0.30 0.30
P
n
0.20 0.20 0.20
ns
Figure 6
D
0
/CET 0.20 0.20 0.20
CEP 0.10 0.10 0.10
S
n
0.00 0.00 0.00
t
PW
(H) Pulse Width HIGH
2.00 2.00 2.00 ns Figures 3, 4
CP, MR
t
OSHL
Maximum Skew Common Edge PLCC Only
Output-to-Output Variation 200 200 200 ps (Note 7)
Clock to Output Path
t
OSLH
Maximum Skew Common Edge PLCC Only
Output-to-Output Variation 200 200 200 ps (Note 7)
Clock to Output Path
t
OST
Maximum Skew Opposite Edge PLCC Only
Output-to-Output Variation 230 230 230 ps (Note 7)
Clock to Output Path
t
PS
Maximum Skew PLCC Only
Pin (Signal) Transition Variation 245 245 245 ps (Note 7)
Clock to Output Path
P1-P3P4-P6P7-P9P10-P12P13-P14

100336QCX

Mfr. #:
Buy 100336QCX
Manufacturer:
ON Semiconductor / Fairchild
Description:
Counter Shift Registers 4-Stage Ctr/Shft Reg
Lifecycle:
New from this manufacturer.
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