F-51852GNFJ-SLW-AEN (AE) No. 2005-0268 OPTREX CORPORATION Page 5/23
2.3. AC Characteristics
2.3.1. Read/Write Operation Sequence (80 series CPU)
VDD=4.5~5.5V
Parameter Symbol Min. Max. Units
Address Hold Time
t
AH8 0 - ns
Address Setup Time
t
AW8 0 - ns
System Cycle Time
t
CYC8 166 - ns
Control Low Pulse Width(Write)
t
CCLW 30 - ns
Control Low Pulse Width(Read)
t
CCLR 70 - ns
Control High Pulse Width(Write)
t
CCHW 30 - ns
Control High Pulse Width(Read)
t
CCHR 30 - ns
Data Setup Time
t
DS8 30 - ns
Data Hold Time
t
DH8 10 - ns
RD Access Time
t
ACC8 - 70 ns
Output Disable Time
t
OH8 10 50 ns
Input Signal Rise/Fall Time
t
r,
t
f - 15 ns
VDD=2.7~4.5V
Parameter Symbol Min. Max. Units
Address Hold Time
t
AH8 0 - ns
Address Setup Time
t
AW8 0 - ns
System Cycle Time
t
CYC8 300 - ns
Control Low Pulse Width(Write)
t
CCLW 60 - ns
Control Low Pulse Width(Read)
t
CCLR 120 - ns
Control High Pulse Width(Write)
t
CCHW 60 - ns
Control High Pulse Width(Read)
t
CCHR 60 - ns
Data Setup Time
t
DS8 40 - ns
Data Hold Time
t
DH8 15 - ns
RD Access Time
t
ACC8 - 140 ns
Output Disable Time
t
OH8 10 100 ns
Input Signal Rise/Fall Time
t
r,
t
f - 15 ns
VDD=2.2~2.7V
Parameter Symbol Min. Max. Units
Address Hold Time
t
AH8 0 - ns
Address Setup Time
t
AW8 0 - ns
System Cycle Time
t
CYC8 1000 - ns
Control Low Pulse Width(Write)
t
CCLW 120 - ns
Control Low Pulse Width(Read)
t
CCLR 240 - ns
Control High Pulse Width(Write)
t
CCHW 120 - ns
Control High Pulse Width(Read)
t
CCHR 120 - ns
Data Setup Time
t
DS8 80 - ns
