74ACTQ533SC

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74ACTQ533
DC Electrical Characteristics (Continued)
Note 2: All outputs loaded; thresholds on input associated with output under test.
Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
Note 4: DIP package.
Note 5: Max number of outputs defined as (n). Data inputs are driven 0V to 3V. One output @ GND.
Note 6: Max number of data inputs (n) switching. (n1) inputs switching 0V to 3V Input-under-test switching: 3V to threshold (V
ILD
), 0V to threshold (V
IHD
),
f = 1 MHz.
AC Electrical Characteristics
Note 7: Voltage Range 5.0 is 5.0V ± 0.5V.
Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
). Parameter guaranteed by design.
AC Operating Requirements
Note 9: Voltage Range 5.0 is 5.0V ± 0.5V.
Capacitance
Symbol Parameter
V
CC
T
A
= +25°C T
A
= 40°C to +85°C
Units Conditions
(V) Typ Guaranteed Limits
V
ILD
Maximum LOW Level
5.0 1.2 0.8 V (Note 4)(Note 6)
Dynamic Input Voltage
Symbol Parameter
V
CC
T
A
= + 25°CT
A
= 40°C to + 85°C
Units
(V)
C
L
= 50 pF C
L
= 50 pF
(Note 7) Min Typ Max Min Max
t
PHL
Propagation Delay
5.0 2.0 6.0 8.0 2.0 8.5 ns
t
PLH
D
n
to O
n
t
PHL
Propagation Delay
5.0 2.5 7.0 9.0 2.5 9.5 ns
t
PLH
LE to O
n
t
PZL
, t
PZH
Output Enable Time 5.0 2.0 7.0 9.0 2.0 9.5 ns
t
PHZ
, t
PLZ
Output Disable Time 5.0 1.0 8.0 10.0 1.0 10.5 ns
t
OSHL
Output to Output Skew
5.0 0.5 1.0 1.0 ns
t
OSLH
D
n
to O
n
(Note 8)
Symbol Parameter
V
CC
T
A
= + 25°CT
A
= 40°C to + 85°C
Units
(V)
C
L
= 50 pF C
L
= 50 pF
(Note 9) Typ Guaranteed Minimum
t
S
Setup Time, HIGH or LOW
5.0 0 3.0 3.0 ns
D
n
to LE
t
H
Hold Time, HIGH or LOW
5.0 0 1.5 1.5 ns
D
n
to LE
t
W
LE Pulse Width, HIGH 5.0 2.0 4.0 4.0 ns
Symbol Parameter Typ Units Conditions
C
IN
Input Capacitance 4.5 pF V
CC
= OPEN
C
PD
Power Dissipation Capacitance 40 pF V
CC
= 5.0V
5 www.fairchildsemi.com
74ACTQ533
FACT Noise Characteristics
The setup of a noise characteristics measurement is critical
to the accuracy and repeatability of the tests. The following
is a brief description of the setup used to measure the
noise characteristics of FACT.
Equipment:
Hewlett Packard Model 8180A Word Generator
PC-163A Test Fixture Tektronics Model 7854 Oscillo-
scope
Procedure:
1. Verify Test Fixture Loading: Standard Load 50 pF,
500.
2. Deskew the HFS generator so that no two channels
have greater than 150 ps skew between them. This
requires that the oscilloscope be deskewed first. It is
important to deskew the HFS generator channels
before testing. This will ensure that the outputs switch
simultaneously.
3. Terminate all inputs and outputs to ensure proper load-
ing of the outputs and that the input levels are at the
correct voltage.
4. Set the HFS generator to toggle all but one output at a
frequency of 1 MHz. Greater frequencies will increase
DUT heating and effect the results of the measure-
ment.
5. Set the HFS generator input levels at 0V LOW and 3V
HIGH for ACT devices and 0V LOW and 5V HIGH for
AC devices. Verify levels with a digital volt meter.
FIGURE 1. Quiet Output Noise Voltage Waveforms
Note 10: V
OHV
and V
OLP
are measured with respect to ground reference.
Note 11: Input pulses have the following characteristics:
f = 1 MHz, t
r
= 3ns, t
f
= 3ns, skew < 150 ps.
V
OLP
/V
OLV
and V
OHP
/V
OHV
:
Determine the quiet output pin that demonstrates the
greatest noise levels. The worst case pin will usually be
the furthest from the ground pin. Monitor the output volt-
ages using a 50 coaxial cable plugged into a standard
SMB type connector on the test fixture. Do not use an
active FET probe.
Measure V
OLP
and V
OLV
on the quiet output during the
worst case transition for active and enable. Measure
V
OHP
and V
OHV
on the quiet output during the worst
case active and enable transition.
Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
V
ILD
and V
IHD
:
Monitor one of the switching outputs using a 50 coaxial
cable plugged into a standard SMB type connector on
the test fixture. Do not use an active FET probe.
First increase the input LOW voltage level, V
IL
, until the
output begins to oscillate or steps out a min of 2 ns.
Oscillation is defined as noise on the output LOW level
that exceeds V
IL
limits, or on output HIGH levels that
exceed V
IH
limits. The input LOW voltage level at which
oscillation occurs is defined as V
ILD
.
Next decrease the input HIGH voltage level on the V
IH
until the output begins to oscillate or steps out a min of 2
ns. Oscillation is defined as noise on the output LOW
level that exceeds V
IL
limits, or on output HIGH levels
that exceed V
IH
limits. The input HIGH voltage level at
which oscillation occurs is defined as V
IHD
.
Verify that the GND reference recorded on the oscillo-
scope has not drifted to ensure the accuracy and repeat-
ability of the measurements.
FIGURE 2. Simultaneous Switching Test Circuit
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74ACTQ533
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
Package Number M20B

74ACTQ533SC

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Latches Octal Trans Latch
Lifecycle:
New from this manufacturer.
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