AD8131
Rev. B | Page 15 of 20
OPERATIONAL DESCRIPTION
AD8131
R
G
R
G
R
F
R
F
R
L, dm
V
OUT, dm
–OUT
+OUT
–OUT
+OUT
+IN
–IN
+D
IN
–D
IN
V
OCM
01072-039
Figure 39. Circuit Definitions
Differential voltage refers to the difference between two node
voltages. For example, the output differential voltage (or
equivalently output differential-mode voltage) shown in
Figure 39 is defined as
(
)
OUTOUT
dmOUT
VVV
+
=
,
V
+OUT
and V
–OUT
refer to the voltages at the +OUT and −OUT
terminals with respect to a common reference.
Common-mode voltage refers to the average of two node
voltages. The output common-mode voltage is defined as
(
)
2
, OUTOUTcmOUT
VVV
+
+
=
Balance is a measure of how well differential signals are
matched in amplitude and exactly 180 degrees apart in phase.
Balance is most easily determined by placing a well-matched
resistor divider between the differential voltage nodes and
comparing the magnitude of the signal at the divider’s midpoint
with the magnitude of the differential signal. By this definition,
output balance is the magnitude of the output common-mode
voltage divided by the magnitude of the output differential-
mode voltage.
dmOUT
cmOUT
V
V
ErrorBalanceOutput
,
,
=
AD8131
Rev. B | Page 16 of 20
THEORY OF OPERATION
The AD8131 differs from conventional op amps in that it has
two outputs whose voltages move in opposite directions. Like
an op amp, it relies on high open-loop gain and negative
feedback to force these outputs to the desired voltages. The
AD8131 behaves much like a standard voltage feedback op amp
and makes it easy to perform single-ended-to-differential
conversion, common-mode level-shifting, and amplification of
differential signals.
Previous discrete and integrated differential driver designs used
two independent amplifiers and two independent feedback
loops, one to control each of the outputs. When these circuits
are driven from a single-ended source, the resulting outputs are
typically not well balanced. Achieving a balanced output
typically required exceptional matching of the amplifiers and
feedback networks.
DC common-mode level shifting has also been difficult with
previous differential drivers. Level shifting required the use of a
third amplifier and feedback loop to control the output
common-mode level. Sometimes the third amplifier has also
been used to attempt to correct an inherently unbalanced
circuit. Excellent performance over a wide frequency range has
proven difficult with this approach.
The AD8131 uses two feedback loops to separately control the
differential and common-mode output voltages. The differential
feedback, set by internal resistors, controls only the differential
output voltage. The common-mode feedback controls only the
common-mode output voltage. This architecture makes it easy
to arbitrarily set the common-mode output level. It is forced, by
internal common-mode feedback, to be equal to the voltage
applied to the V
OCM
input, without affecting the differential
output voltage.
The AD8131 architecture results in outputs that are very highly
balanced over a wide frequency range without requiring
external components or adjustments. The common-mode
feedback loop forces the signal component of the output
common-mode voltage to be zeroed. The result is nearly
perfectly balanced differential outputs, of identical amplitude
and exactly 180 degrees apart in phase.
ANALYZING AN APPLICATION CIRCUIT
The AD8131 uses high open-loop gain and negative feedback to
force its differential and common-mode output voltages in such
a way as to minimize the differential and common-mode error
voltages. The differential error voltage is defined as the voltage
between the differential inputs labeled +IN and −IN in
Figure 39. For most purposes, this voltage can be assumed to be
zero. Similarly, the difference between the actual output
common-mode voltage and the voltage applied to V
OCM
can also
be assumed to be zero. Starting from these two assumptions,
any application circuit can be analyzed.
CLOSED-LOOP GAIN
The differential mode gain of the circuit in Figure 39 can be
described by the following equation:
2==
G
F
dmIN,
dmOUT,
R
R
V
V
where
R
F
= 1.5 kΩ and R
G
= 750 Ω nominally.
ESTIMATING THE OUTPUT NOISE VOLTAGE
Similar to the case of a conventional op amp, the differential
output errors (noise and offset voltages) can be estimated by
multiplying the input referred terms, at +IN and −IN, by the
circuit noise gain. The noise gain is defined as
31 =
+=
G
F
N
R
R
G
The total output referred noise for the AD8131, including the
contributions of R
F
, R
G
, and op amp, is nominally 25 nV/√Hz
at 20 MHz.
CALCULATING THE INPUT IMPEDANCE OF AN
APPLICATION CIRCUIT
The effective input impedance of a circuit such as that in
Figure 39, at +D
IN
and −D
IN
, will depend on whether the
amplifier is being driven by a single-ended or differential signal
source. For balanced differential input signals, the input
impedance (R
IN, dm
) between the inputs (+D
IN
and −D
IN
) is
Ω
=
=
k5.12
,
G
dmIN
RR
In the case of a single-ended input signal (for example if −D
IN
is
grounded and the input signal is applied to +D
IN
), the input
impedance becomes
()
Ω=
+×
= k 125.1
2
1
,
F
G
F
G
dmIN
RR
R
R
R
The input impedance is effectively higher than it would be for a
conventional op amp connected as an inverter because a
fraction of the differential output voltage appears at the inputs
as a common-mode signal, partially bootstrapping the voltage
across the input resistor R
G
.
AD8131
Rev. B | Page 17 of 20
INPUT COMMON-MODE VOLTAGE RANGE IN
SINGLE-SUPPLY APPLICATIONS
The AD8131 is optimized for level-shifting ground referenced
input signals. For a single-ended input this would imply, for
example, that the voltage at −D
IN
in Figure 39 would be zero
volts when the amplifier’s negative power supply voltage (at V−)
was also set to zero volts.
SETTING THE OUTPUT COMMON-MODE VOLTAGE
The AD8131’s V
OCM
pin is internally biased at a voltage
approximately equal to the midsupply point (average value of
the voltages on V+ and V−). Relying on this internal bias results
in an output common-mode voltage that is within about 25 mV
of the expected value.
In cases where more accurate control of the output common-
mode level is required, it is recommended that an external
source, or resistor divider (made up of 10 kΩ resistors), be used.
DRIVING A CAPACITIVE LOAD
A purely capacitive load can react with the pin and bondwire
inductance of the AD8131 resulting in high frequency ringing
in the pulse response. One way to minimize this effect is to
place a small resistor in series with the amplifier’s outputs as
shown in
Figure 26.

AD8131ARMZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Differential Amplifiers IC Hi-Speed
Lifecycle:
New from this manufacturer.
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