DS1073
15 of 18
AC ELECTRICAL CHARACTERISTICS (T
A
= 0°C to +70°C) (V
CC
=2.7V to 3.6V)
PARAMETER SYMBOL CONDITION MIN TYP MAX UNITS NOTES
Output Frequency
Accuracy
f
O
V
CC
= 3.15V,
T
A
= 25°C
-0.5 0 +0.5 %
Combined Frequency
Variation
Df
O’
Over temp and
voltage
-1 +1 %
Long Term Stability
Df
O”
T = 25°C
-0.5 +0.5 % 1
External clock 50 MHz
Maximum Input
Frequency
f
OSCIN
Crystal
reference
25 MHz
2
Minimum Output
Frequency
f
OUT
29.3 kHz 3
Power-Up Time t
POR
+ t
STB
0.1 1 ms 4, 5
Enable OUT from PDN ↑
t
STABb
0.1 1 ms 5
Enable OUT0 from PDN ↑
t
STAB
0.1 1 ms 5, 6
I/O Hi-Z from PDN ↓
t
PDN
1ms
OUT0 Hi-Z from PDN ↓
t
PDN
1ms
Load Capacitance
(I/O, OUT0)
C
L
15 pF 7
Output Duty Cycle
I/O
OUT0
40
40
60
60
%
%
Jitter J 100 pS 8
NOTES:
1. Additive to Df
O’
.
2. This is the maximum frequency which can be applied to OSCIN, or, the maximum crystal frequency
that can be used. If a crystal is used it must be operated in fundamental mode.
3. The values of M, N and the frequency of OSCIN (if used) must be chosen so that this spec is met.
4. This is the time from when V
CC
is applied until the output starts oscillating.
5. When the device is initially powered up, or restored from the power-down mode, OE should be
asserted (high). Otherwise the start of the t
STAB
interval will be delayed until OE goes high. OE can
subsequently be returned to a low level during the t
STAB
interval to force out low after the t
STAB
,
interval. If the external mode is selected t
STAB
will be a function of the OSCIN period, i.e., external
clock frequency. See “Calculated Parameters” to determine the value of t
STAB
in this case.
6. Although OE does not normally affect OUT0 operation, if OE is held low during power-up the start of
the t
STAB
period will be delayed until OE is asserted. If OE remains low, OUT0 will not start.
7. Operation with higher capacitive loads is possible but may impair output voltage swing and maximum
operation frequency.
8. Parameter given is 3 sigma.
