XRT71D04
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4 CHANNEL E3/DS3/STS-1 JITTER ATTENUATOR, STS-1 TO DS3 DESYNCHRONIZER
REV. 1.1.1
17
2.0 OPERATING MODES
2.1 H
ARDWARE
M
ODE
The HOST pin is used to select the operating mode of
the XRT71D04. In Hardware mode (connect this pin
to ground), the serial processor interface is disabled
and hard-wired pins are used to control configuration
and report status.
2.2 H
OST
M
ODE
:
In Host mode (connect this pin to VDD), the serial
port interface pins are used to control configuration
and status report. In this mode, serial interface pins :
SDI, SDO,SCLK and CS
are used.
A listing of these Command Registers, their Address-
es, and their bit-formats are listed below in Table 4.
T
ABLE
2: XRT71D04 M
AXIMUM
J
ITTER
T
OLERANCE
A
PPLICATION
DS3 E3 STS-1
F
IFO
S
IZE
16 32 16 32 16 32
F
REQ
. (HZ) UI (
PEAK
TO
PEAK
)UI (
PEAK
TO
PEAK
)UI (
PEAK
TO
PEAK
)
10 34.313 >64 26.689 53.313
20 21.439 43.188 18.564 37.438
30 18.314 36.813 16.689 33.938
40 16.939 34.313 16.064 32.688
50 16.314 33.188 15.689 32.063
60 16.064 32.563 15.564 31.689
80 15.689 31.814 15.314 31.314
100 15.439 31.439 15.314 31.189
125 15.439 31.314 15.189 31.064
150 15.314 31.189 15.189 31.064
200 15.314 31.064 15.189 30.939
300 15.189 30.939 15.064 30.939
500 15.189 30.939 15.064 30.939
>1000 15.0189 30.939 15.189 30.939
T
ABLE
3: F
UNCTIONS
OF
DUAL
MODE
PINS
IN
H
ARDWARE
M
ODE
CONFIGURATION
P
IN
#P
IN
N
AME
F
UNCTION
,
WHILE
IN
THE
H
ARDWARE
M
ODE
25 DJA0/SCLK DJA0
37 DJA2/(CS
)DJA2
77 DJA1/(SDI) DJA1