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PHD9NQ20T,118

P1-P3P4-P6P7-P9P10-P12P13-P13
PHD9NQ20T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 16 December 2010 3 of 12
NXP Semiconductors
PHD9NQ20T
N-channel TrenchMOS standard level FET
Fig 1. Normalized total power dissipation as a
function of mounting base temperature
Fig 2. Normalized continuous drain current as a
function of mounting base temperature
T
mb
= 25 °C; I
DM
is single pulse unclamped inductive load
Fig 3. Safe operating area; continuous and peak drain
currents as a function of drain-source voltage
Fig 4. Single-shot avalanche rating; avalanche
current as a function of avalanche period
40
60
20
80
100
P
der
(%)
0
T
mb
(°C)
0 20015050 100
003aae674
40
60
20
80
100
I
D
(%)
0
T
mb
(°C)
0 20015050 100
003aae675
V
DS
(V)
110
3
10
2
10
003aae676
10
2
10
10
3
I
DM
(A)
1
D.C.
100 ms
10 ms
1 ms
100 μs
tp = 10 μs
R
DS(on)
= V
DS
/ I
D
003aae688
t
AV
(ms)
10
−3
10110
−2
10
−1
1
10
l
AS
(A)
10
−1
25 °C
T
j
prior to avalanche = 150 °C
PHD9NQ20T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 16 December 2010 4 of 12
NXP Semiconductors
PHD9NQ20T
N-channel TrenchMOS standard level FET
5. Thermal characteristics
Table 5. Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-mb)
thermal resistance from
junction to mounting base
--1.7K/W
R
th(j-a)
thermal resistance from
junction to ambient
mounted on printed-circuit board ;
minimum footprint
-50-K/W
Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration
003aae677
1
10
−1
10
Z
th(j-mb)
(K/W)
10
−2
t
p
(s)
10
−6
110
−1
10
−2
10
−5
10
−3
10
−4
t
p
t
p
T
P
t
T
δ =
single pulse
δ = 0.5
0.2
0.1
0.05
0.02
PHD9NQ20T All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 03 — 16 December 2010 5 of 12
NXP Semiconductors
PHD9NQ20T
N-channel TrenchMOS standard level FET
6. Characteristics
Table 6. Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
drain-source breakdown
voltage
I
D
= 0.25 mA; V
GS
=0V; T
j
= 25 °C 200 - - V
I
D
= 0.25 mA; V
GS
=0V; T
j
= -55 °C 178 - - V
V
GS(th)
gate-source threshold
voltage
I
D
=1mA; V
DS
=V
GS
; T
j
= 175 °C 1 - - V
I
D
=1mA; V
DS
=V
GS
; T
j
=25°C 234V
I
D
=1mA; V
DS
=V
GS
; T
j
=-55°C --6V
I
DSS
drain leakage current V
DS
=200V; V
GS
=0V; T
j
= 175 °C - - 500 µA
V
DS
=200V; V
GS
=0V; T
j
= 25 °C - 0.05 10 µA
I
GSS
gate leakage current V
GS
=10V; V
DS
=0V; T
j
= 25 °C - 10 100 nA
V
GS
=-10V; V
DS
=0V; T
j
= 25 °C - 10 100 nA
R
DSon
drain-source on-state
resistance
V
GS
=10V; I
D
= 4.5 A; T
j
=175°C --1.16Ω
V
GS
=10V; I
D
= 4.5 A; T
j
= 25 °C - 300 400 mΩ
Dynamic characteristics
Q
G(tot)
total gate charge I
D
=9A; V
DS
= 160 V; V
GS
=10V;
T
j
=25°C
-24-nC
Q
GS
gate-source charge - 4 - nC
Q
GD
gate-drain charge - 12 - nC
C
iss
input capacitance V
DS
=25V; V
GS
= 0 V; f = 1 MHz;
T
j
=25°C
- 959 - pF
C
oss
output capacitance - 93 - pF
C
rss
reverse transfer capacitance - 54 - pF
t
d(on)
turn-on delay time V
DS
=100V; R
L
=10Ω; V
GS
=10V;
R
G(ext)
=5.6Ω; T
j
=25°C
-8-ns
t
r
rise time - 19 - ns
t
d(off)
turn-off delay time - 25 - ns
t
f
fall time - 15 - ns
g
fs
transfer conductance V
DS
=25V; I
D
= 4.5 A; T
j
=25°C 3.8 6 - S
L
D
internal drain inductance from tab to centre of die ; T
j
= 25 °C - 3.5 - nH
L
S
internal source inductance From source lead to source bond pad ;
T
j
=25°C
-7.5-nH
Source-drain diode
V
SD
source-drain voltage I
S
=9A; V
GS
=0V; T
j
= 25 °C - 0.85 1.2 V
t
rr
reverse recovery time I
S
=9A; dI
S
/dt = -100 A/µs;
V
GS
=-10V; V
DS
=25V; T
j
=25°C
-92-ns
Q
r
recovered charge - 0.5 - µC
P1-P3P4-P6P7-P9P10-P12P13-P13

PHD9NQ20T,118

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Manufacturer:
Nexperia
Description:
MOSFET TAPE13 PWR-MOS
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