10 Integrated Silicon Solution, Inc. — www.issi.com
Rev. C1
12/18/2016
IS61C5128AL/AS IS64C5128AL/AS
AC wAVEFORMS
wRITE CYCLE NO. 1 (WE Controlled)
(1,2)
DATA UNDEFINED
t
WC
VALID ADDRESS
t
SCS
t
PWE1
t
PWE2
t
AW
t
HA
HIGH-Z
t
HD
t
SA
t
HZWE
ADDRESS
CE
WE
D
OUT
D
IN
DATA
IN
VALID
t
LZWE
t
SD
CE_WR1.eps
Notes:
1. TheinternalwritetimeisdenedbytheoverlapofCELOWandWELOW.AllsignalsmustbeinvalidstatestoinitiateaWrite,
butanyonecangoinactivetoterminatetheWrite.TheDataInputSetupandHoldtimingarereferencedtotherisingorfalling
edgeofthesignalthatterminatestheWrite.
2. I/OwillassumetheHigh-ZstateifOE
Vih.
Integrated Silicon Solution, Inc. — www.issi.com 11
Rev. C1
12/18/2016
IS61C5128AL/AS IS64C5128AL/AS
wRITE CYCLE NO. 2
(OE isHIGHDuringWriteCycle)
(1,2)
wRITE CYCLE NO. 3
(OE isLOWDuringWriteCycle)
(1)
Notes:
1. TheinternalwritetimeisdenedbytheoverlapofCELOWandWELOW.AllsignalsmustbeinvalidstatestoinitiateaWrite,
butanyonecangoinactivetoterminatetheWrite.TheDataInputSetupandHoldtimingarereferencedtotherisingorfalling
edgeofthesignalthatterminatestheWrite.
2. I/OwillassumetheHigh-ZstateifOE
Vih.
DATA UNDEFINED
LOW
t
WC
VALID ADDRESS
t
PWE1
t
AW
t
HA
HIGH-Z
t
HD
t
SA
t
HZWE
ADDRESS
CE
WE
D
OUT
D
IN
OE
DATA
IN
VALID
t
LZWE
t
SD
CE_WR2.eps
DATA UNDEFINED
t
WC
VALID ADDRESS
LOW
LOW
t
PWE2
t
AW
t
HA
HIGH-Z
t
HD
t
SA
t
HZWE
ADDRESS
CE
WE
D
OUT
DIN
OE
DATA
IN
VALID
t
LZWE
t
SD
CE_WR3.eps
12 Integrated Silicon Solution, Inc. — www.issi.com
Rev. C1
12/18/2016
IS61C5128AL/AS IS64C5128AL/AS
DATA RETENTION wAVEFORM (CE Controlled)
VDD
CE VDD
- 0.2V
t
SDR
t
RDR
V
DR
CE
GND
4.5V
Data Retention Mode
DATA RETENTION SwITCHING CHARACTERISTICS (HIGH SPEED) (IS61/64C5128AL)
Symbol Parameter Test Condition Min. Max. Unit
VdrVddforDataRetention SeeDataRetentionWaveform 2.9 5.5 V
idr DataRetentionCurrent Vdd=2.9V,CE Vdd–0.2V Com. — 8 mA
Vin Vdd – 0.2V, or Vin
Vss + 0.2V
Ind. 10
Auto. 15
typ.
(1)
1
tsdr DataRetentionSetupTime SeeDataRetentionWaveform 0 — ns
trdr RecoveryTime SeeDataRetentionWaveform trC — ns
Note:
1.TypicalValuesaremeasuredatVdd=5V,Ta = 25
o
Candnot100%tested.

IS61C5128AL-10TLI

Mfr. #:
Manufacturer:
ISSI
Description:
SRAM 4M (512Kx8) 10ns Async SRAM
Lifecycle:
New from this manufacturer.
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