ADP3367ARZ

ADP3367
REV. 0
–3–
PIN FUNCTION DESCRIPTION
Mnemonic Function
DD Dropout Detector Output. PNP collector output
which sources current as dropout is reached.
V
IN
Voltage Regulator Input.
GND Ground Pin. Must be connected to 0 V.
LBI Low Battery Detect Input. Compared with 1.255 V.
LBO Low Battery Detect Output. Open Drain Output
that goes low when LBI is below the threshold.
SHDN Digital Input. May be used to disable the device
so that the power consumption is minimized.
SET Voltage Setting Input. Connect to GND for +5 V
output or connect to resistive divider for adjust-
able output.
OUT Regulated Output Voltage. Connect to filter
capacitor.
DIP & SOIC PIN CONFIGURATION
DD
OUT
LBI
GND
IN
LBO
SET
SHDN
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
ADP3367
TERMINOLOGY
Dropout Voltage: The input/output voltage differential at
which the regulator no longer maintains regulation against fur-
ther reductions in input voltage. It is measured when the output
decreases 100 mV from its nominal value. The nominal value is
the measured value with V
IN
= V
OUT
+2 V.
Line Regulation: The change in output voltage as a result of a
change in the input voltage. It is specified for a change of input
voltage from 6 V to 10 V.
Load Regulation: The change in output voltage for a change
in output current. It is specified for an output current change
from 10 mA to 200 mA.
Quiescent Current (I
GND
): The input bias current which
flows into the regulator not including load current. It is mea-
sured on the GND line and is specified in shutdown and also for
different values of load current.
Shutdown: The regulator is disabled and power consumption
is minimized.
Dropout Detector: An output that indicates that the regulator
is dropping out of regulation.
Maximum Power Dissipation: The maximum total device
dissipation for which the regulator will continue to operate
within specifications.
GENERAL INFORMATION
The ADP3367 contains a micropower bandgap reference volt-
age source, an error amplifier A1, two comparators (C1, C2)
and a series PNP output pass transistor.
CIRCUIT DESCRIPTION
The internal bandgap voltage reference is trimmed to 1.255V
and is used as a reference input to the error amplifier A1. The
feedback signal from the regulator output is supplied to the
other input by an on-chip voltage divider or by two external
resistors. When the SET input is at ground, the internal divider
provides the error amplifier’s feedback signal giving a +5V out-
put. When SET is at more than 50 mV above ground, compara-
tor C1 switches the error amplifier’s input directly to the SET
pin, and external resistors are used to set the output voltage.
The external resistors are selected so that the desired output
voltage gives 1.255 V at the SET input.
The output from the error amplifier supplies base current to the
PNP output pass transistor which provides output current. Up
to 300 mA output current is available provided that the device
power dissipation is not exceeded.
Comparator C2 compares the voltage on the Low Battery Input
(LBI) pin to the internal +1.255 V reference voltage. The out-
put from the comparator drives an open drain FET connected
to the Low Battery Output pin, LBO. The Low Battery Thresh-
old may be set using a suitable voltage divider connected to
LBI. When the voltage on LBI falls below 1.255 V, the open
drain output, LBO, is pulled low.
A shutdown (SHDN) input that can be used to disable the
error amplifier and hence the voltage output is also available.
The supply current in shutdown is less than 0.75 µA.
ADP3367
IN
SHDN
LBO
LBI
GND
50mV
SET
DD
OUT
1.255V
REF
A1
C1
C2
Figure 1. ADP3367 Functional Block Diagram
A
300100 200
LOAD CURRENT – mA
500
250
10
DROPOUT VOLTAGE – mV
1
T
A
= +25°C
Figure 2. Dropout Voltage vs. Load Current
10
0.01
10000.1
0.1
0.01
1
100101
I
OUT
– mA
GROUND CURRENT – mA
V
IN
= 6V
T
A
= +25°C
Figure 3. Ground Current vs. Load Current
I-O DIFFERENCE – mV
1000
100
1
0.00 0.450.05
DD OUTPUT CURRENT – µA
0.10 0.15 0.20 0.25 0.30 0.35 0.40
10
T
A
= +25°CT
A
= +25°C
100mA
50mA
20mA
10mA
5mA
2mA
Figure 4. DD Output Current vs. I-O Differential
1 – mA
2.5
1.5
0.0
0 200
V – mV
50 100 150
1.0
0.5
T
A
= +25°C
V
IN
= 6V
C
L
= 10µF
2.0
Figure 5. Load Regulation (DV
OUT
vs. DI
OUT
)
Figure 6. Dynamic Response to Input Change
CH1 1.00V CH2 20.0mV M 2.00ms
100mA
10mA
OUTPUT
CURRENT
V
OUT
20mV
0V
Figure 7. Dynamic Response to Load Change
ADP3367–Typical Performance Characteristics
–4–
REV. 0
A
ADP3367
REV. 0
–5–
APPLICATIONS INFORMATION
Circuit Configurations
For a fixed +5 V output the SET input should be grounded, and
no external resistors are necessary. This basic configuration is
shown in Figure 8. The input voltage can range from +5.15 V
to +16.5 V, and output currents up to 300 mA are available
provided that the maximum package power dissipation is not
exceeded.
IN
OUT
GNDSET SHDN
ADP3367
+5V
OUTPUT
C1
10µF
++
Figure 8. Fixed +5 V Output Circuit
Output Voltage Setting
If the SET input is connected to a resistor divider network, the
output voltage is set according to the following equation:
V
OUT
=V
SET
×
R1+ R2
R1
where V
SET
= 1.255 V.
IN
OUT
GND
SET
SHDN
ADP3367
+
R1
R2
V
IN
V
OUT
C1
10µF
Figure 9. Adjustable Output Circuit
The resistor values may be selected by first choosing a value for
R1 and then selecting R2 according to the following equation:
R2 = R1×
V
OUT
V
SET
1
The input leakage current on SET is 10 nA maximum. This
allows large resistor values to be chosen for R1 and R2 with
little degradation in accuracy. For example, a 1 M resistor
may be selected for R1, and then R2 may be calculated accord-
ingly. The tolerance on SET is guaranteed at less than ±25 mV,
so in most applications fixed resistors will be suitable.
Shutdown Input (SHDN)
The SHDN input allows the regulator to be switched off with a
logic level signal. This will disable the output and reduce the
current drain to a low quiescent (0.75 µA maximum) current.
This is very useful for low power applications. Driving the
SHDN input to greater than 1.5 V places the part in shutdown.
If the shutdown function is not being used, then SHDN should
be connected to GND.
Low Supply or Low Battery Detection
The ADP3367 contains on-chip circuitry for low power supply
or battery detection. If the voltage on the LBI pin falls below
the internal 1.255 V reference, then the open drain output LBO
will go low. The low threshold voltage may be set to any voltage
above 1.255 V by appropriate resistor divider selection.
R3 = R4×
V
BATT
V
LBI
1
where R3 and R4 are the resistive divider resistors and V
BATT
is
the desired low voltage threshold.
Since the LBI input leakage current is less than 10 nA, large
values may be selected for R3 and R4 in order to minimize
loading. For example, a 6 V low threshold, may be set using
10 M for R3 and 2.7 M for R4.
The LBO output is an open-drain output that goes low sinking
current when LBI is less than 1.255 V. A pull-up resistor of
10 k or greater may be used to obtain a logic output level with
the pull-up resistor connected to V
OUT
.
IN
OUT
LBO
ADP3367
C1
10µF
+
10k
V
IN
LBI
GND SETSHDN
R3
R4
LOW BATTERY
STATUS OUTPUT
V
OUT
Figure 10. Low Battery/Supply Detect Circuit
Dropout Detector
The ADP3367 features an extremely low dropout voltage mak-
ing it suitable for low voltage systems where headroom is
limited. A dropout detector is also provided. The dropout
detector output, DD, changes as the dropout voltage approaches
its limit. This is useful for warning that regulation can no longer be
maintained. The dropout detector output is an open collector out-
put from a PNP transistor. Under normal operating conditions
with the input voltage more than 300 mV above the output, the
PNP transistor is off and no current flows out the DD pin. As the
voltage differential reduces to less than 300 mV, the transistor
switches on and current is sourced. This condition indicates that
regulation can no longer be maintained. Please refer to Figure 4 in
the “Typical Performance Characteristics.” The current output
can be translated into a voltage output by connecting a resistor
from DD to GND. A resistor value of 100 k is suitable. A digital
status signal can be obtained using a comparator. The on-chip
comparator LBI may be used if it is not being used to monitor a
battery voltage. This is illustrated in Figure 11.
A

ADP3367ARZ

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Description:
Linear Voltage Regulators 5V Fixed Adj LDO
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