OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

74HCT7030D,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
December 1990 7
Philips Semiconductors Product specification
9-bit x 64-word FIFO register; 3-state 74HC/HCT7030
Fig.5 Logic diagram.
(see control flip-flops)
(1) LOW on S input of flip-flops FS, FB and FP will set Q output to HIGH independent of state on R input.
(2) LOW on R input to FF1 to FF64 will set Q output to LOW independent of state on S input.
December 1990 8
Philips Semiconductors Product specification
9-bit x 64-word FIFO register; 3-state 74HC/HCT7030
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”
.
Output capability: standard
I
CC
category: LSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
=t
f
= 6 ns; C
L
= 50 pF
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
t
PHL
/ t
PLH
propagation delay
MR to DIR, DOR
69
25
20
210
42
36
265
53
45
315
63
54
ns 2.0
4.5
6.0
Fig.8
t
PHL
/ t
PLH
propagation delay
SI to DIR
77
28
22
235
47
40
295
59
50
355
71
60
ns 2.0
4.5
6.0
Fig.6
t
PHL
/ t
PLH
propagation delay
SO to DOR
102
37
30
315
63
54
395
79
67
475
95
81
ns 2.0
4.5
6.0
Fig.9
t
PHL
/ t
PLH
propagation delay
DOR to Q
n
11
4
3
35
7
6
45
9
8
55
11
9
ns 2.0
4.5
6.0
Fig.10
t
PHL
/ t
PLH
propagation delay
SO to Q
n
113
41
33
345
69
59
430
86
73
520
104
88
ns 2.0
4.5
6.0
Fig.14
t
PLH
propagation delay/
ripple through delay
SI to DOR
2.5
0.9
0.7
8.0
1.6
1.3
10
2.0
1.6
12
2.4
1.9
µs 2.0
4.5
6.0
Fig.10
t
PLH
propagation delay/
bubble-up delay
SO to DIR
3.3
1.2
1.0
10.0
2.0
1.6
12
2.5
2.0
15
3.0
2.4
µs 2.0
4.5
6.0
Fig.7
t
PZH
/ t
PZL
3-state output enable
OE to Q
n
52
19
15
175
35
30
220
44
37
265
53
45
ns 2.0
4.5
6.0
Fig.16
t
PHZ
/ t
PLZ
3-state output disable
OE to Q
n
50
18
14
150
30
26
190
38
33
225
45
38
ns 2.0
4.5
6.0
Fig.16
t
THL
/ t
TLH
output transition time 19
7
6
75
15
13
95
19
16
110
22
19
ns 2.0
4.5
6.0
Fig.14
t
W
SI pulse width
HIGH or LOW
50
10
9
14
5
4
65
13
11
75
15
13
ns 2.0
4.5
6.0
Fig.6
December 1990 9
Philips Semiconductors Product specification
9-bit x 64-word FIFO register; 3-state 74HC/HCT7030
t
W
SO pulse width
HIGH or LOW
100
20
17
33
12
10
125
25
21
150
30
26
ns 2.0
4.5
6.0
Fig.9
t
W
DIR pulse width
HIGH
10
5
4
47
17
14
145
29
25
8
4
3
180
36
31
8
4
3
220
44
38
ns 2.0
4.5
6.0
Fig.7
t
W
DOR pulse width
HIGH
10
5
4
47
17
14
145
29
25
8
4
3
180
36
31
8
4
3
220
44
38
ns 2.0
4.5
6.0
Fig.10
t
W
MR pulse width
LOW
70
14
12
22
8
6
90
18
15
105
21
18
ns 2.0
4.5
6.0
Fig.8
t
rem
removal time
MR to SI
80
16
14
24
8
7
100
20
17
120
24
20
ns 2.0
4.5
6.0
Fig.15
t
su
set-up time
D
n
to SI
−35
−7
−6
−36
−13
−10
−45
−9
−8
−55
−11
−9
ns 2.0
4.5
6.0
Fig.13
t
h
hold time
D
n
to SI
135
27
23
44
16
13
170
34
29
205
41
35
ns 2.0
4.5
6.0
Fig.13
f
max
maximum clock pulse
frequency
SI, SO burst mode
9.9
30
36
2.8
14
16
2.4
12
14
MHz 2.0
4.5
6.0
Figs 11 and 12
f
max
maximum clock pulse
frequency
SI, SO using flags
9.9
30
36
2.8
14
16
2.4
12
14
MHz 2.0
4.5
6.0
Figs 6 and 9
f
max
maximum clock pulse
frequency
SI, SO cascaded
7.6
23
27
2.2
11
13
1.8
9.2
11
MHz 2.0
4.5
6.0
Figs 6 and 9
SYMBOL PARAMETER
T
amb
(°C)
UNIT
TEST CONDITIONS
74HC
V
CC
(V)
WAVEFORMS+25 −40 to +85 −40 to +125
min. typ. max. min. max. min. max.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22

74HCT7030D,118

Mfr. #:
Buy 74HCT7030D,118
Manufacturer:
NXP Semiconductors
Description:
IC 9X64 FIFO REGISTER 3ST 28SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet