Document Number: 38-05132 Rev. *I Page 9 of 14
Figure 8. Write Cycle No. 3 (WE Controlled, LOW)
Truth Table
CE OE WE BLE BHE IO
1
– IO
8
IO
9
– IO
16
Mode Power
HXXXXHigh ZHigh ZPower Down Standby (I
SB
)
L L H L L Data Out Data Out Read – All Bits Active (I
CC
)
L H Data Out High Z Read – Lower Bits Only Active (I
CC
)
H L High Z Data Out Read – Upper Bits Only Active (I
CC
)
L X L L L Data In Data In Write – All Bits Active (I
CC
)
L H Data In High Z Write – Lower Bits Only Active (I
CC
)
H L High Z Data In Write – Upper Bits Only Active (I
CC
)
L H H X X High Z High Z Selected, Outputs Disabled Active (I
CC
)
L X X H H High Z High Z Selected, Outputs Disabled Active (I
CC
)
Switching Waveforms (continued)
t
HD
t
SD
t
SCE
t
HA
t
AW
t
PWE
t
WC
t
BW
t
SA
t
LZWE
t
HZWE
DATA IO
ADDRESS
CE
WE
BHE,BLE
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