NCP5109A, NCP5109B
www.onsemi.com
5
ELECTRICAL CHARACTERISTIC (V
CC
= V
boot
= 15 V, V
GND
= V
bridge
, −40°C < T
J
< 125°C, Outputs loaded with 1 nF)
Rating Symbol
T
J
−40°C to 125°C
Unit
Min Typ Max
OUTPUT SECTION
Output high short circuit pulsed current V
DRV
= 0 V, PW v 10 ms (Note 1) I
DRVsource
− 250 − mA
Output low short circuit pulsed current V
DRV
= V
CC
, PW v 10 ms (Note 1) I
DRVsink
− 500 − mA
Output resistor (Typical value @ 25°C) Source R
OH
− 30 60 W
Output resistor (Typical value @ 25°C) Sink R
OL
− 10 20 W
High level output voltage, V
BIAS
−V
DRV_XX
@ I
DRV_XX
= 20 mA V
DRV_H
− 0.7 1.6 V
Low level output voltage V
DRV_XX
@ I
DRV_XX
= 20 mA V
DRV_L
− 0.2 0.6 V
DYNAMIC OUTPUT SECTION
Turn−on propagation delay (Vbridge = 0 V) t
ON
− 100 170 ns
Turn−off propagation delay (Vbridge = 0 V or 50 V) (Note 2) t
OFF
− 100 170 ns
Output voltage rise time (from 10% to 90% @ V
CC
= 15 V) with 1 nF load tr − 85 160 ns
Output voltage fall time (from 90% to 10% @V
CC
= 15 V) with 1 nF load tf − 35 75 ns
Propagation delay matching between the High side and the Low side @ 25°C (Note 3) Dt − 20 35 ns
Internal fixed dead time (only valid for B version) (Note 4) DT 65 100 190 ns
Minimum input width that changes the output t
PW1
− − 50 ns
Maximum input width that does not change the output SOIC−8
DFN10
t
PW2
20
15
−
−
−
−
ns
INPUT SECTION
Low level input voltage threshold V
IN
− − 0.8 V
Input pull−down resistor (V
IN
< 0.5 V) R
IN
− 200 − kW
High level input voltage threshold V
IN
2.3 − − V
Logic “1” input bias current @ V
IN_XX
= 5 V @ 25°C I
IN+
− 5 25 mA
Logic “0” input bias current @ V
IN_XX
= 0 V @ 25°C I
IN−
− − 2.0 mA
SUPPLY SECTION
V
CC
UV Start−up voltage threshold V
CC
_stup 8.0 8.9 9.9 V
V
CC
UV Shut−down voltage threshold V
CC
_shtdwn 7.3 8.2 9.1 V
Hysteresis on V
CC
V
CC
_hyst 0.3 0.7 − V
Vboot Start−up voltage threshold reference to bridge pin
(Vboot_stup = Vboot − Vbridge)
Vboot_stup 8.0 8.9 9.9 V
Vboot UV Shut−down voltage threshold Vboot_shtdwn 7.3 8.2 9.1 V
Hysteresis on Vboot Vboot_hyst 0.3 0.7 − V
Leakage current on high voltage pins to GND
(V
BOOT
= V
BRIDGE
= DRV_HI = 200 V)
I
HV_LEAK
− 5 40 mA
Consumption in active mode (V
CC
= Vboot, fsw = 100 kHz and 1 nF load on both driver
outputs)
ICC1 − 4 5 mA
Consumption in inhibition mode (V
CC
= Vboot) ICC2 − 250 400 mA
V
CC
current consumption in inhibition mode ICC3 − 200 − mA
Vboot current consumption in inhibition mode ICC4 − 50 − mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Parameter guaranteed by design.
2. Turn−off propagation delay @ Vbridge = 200 V is guaranteed by design.
3. See characterization curve for Dt parameters variation on the full range temperature.
4. Version B integrates a dead time in order to prevent any cross conduction between DRV_HI and DRV_LO. See timing diagram of Figure 10.
5. Timing diagram definition see: Figure 7, Figure 8 and Figure 9.
