MAX1245
+2.375V, Low-Power, 8-Channel,
Serial 12-Bit ADC
4 _______________________________________________________________________________________
TIMING CHARACTERISTICS
(V
DD
= +2.375V to +3.3V, V
COM
= 0V, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
Note 1: Tested at V
DD
= +2.375V; V
COM
= 0V; unipolar single-ended input mode.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3: External reference (VREF = +2.048V), offset nulled.
Note 4: Ground “on” channel; sine wave applied to all “off” channels.
Note 5: Conversion time defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 6: The common-mode range for the analog inputs is from AGND to V
DD
.
Note 7: Guaranteed by design. Not subject to production testing.
Note 8: ADC performance is limited by the converter’s noise floor, typically 300µVp-p.
Note 9: Measured as
|
V
FS
(2.375V) - V
FS
(3.3V)
|
.
DIN to SCLK Setup
ns400t
STR
CS Rise to SSTRB Output Disable
ns240t
SDV
CS Fall to SSTRB Output Enable
260t
SSTRB
SCLK Fall to SSTRB ns
300t
CL
SCLK Pulse Width Low
ns300SCLK Pulse Width High
ns0
CS to SCLK Rise Hold
ns200t
CSS
CS to SCLK Rise Setup
ns400t
TR
CS Rise to Output Disable
ns240t
DV
CS Fall to Output Enable
t
DO
SCLK Fall to Output Data Valid
ns0t
DH
DIN to SCLK Hold
ns
µs2.0t
ACQ
Acquisition Time
0t
SCK
SSTRB Rise to SCLK Rise
ns200t
DS
UNITSMIN TYP MAXSYMBOL
Internal clock mode only (Note 7)
External clock mode only, Figure 2
External clock mode only, Figure 1
Figure 1
Figure 2
Figure 1
CONDITIONS
Figure 1 ns20 260
t
CSH
t
CH
__________________________________________Typical Operating Characteristics
(V
DD
= 2.5V, VREF = 2.048V, f
CLK
= 1.5MHz, C
LOAD
= 20pF, T
A
= +25°C, unless otherwise noted.)
ns
