16
LTC1709-8/LTC1709-9
Figure 5a. Secondary Output Loop with EXTV
CC
Connection Figure 5b. Capacitive Charge Pump for EXTV
CC
EXTV
CC
Connection
The LTC1709 contains an internal P-channel MOSFET
switch connected between the EXTV
CC
and INTV
CC
pins.
When the voltage applied to EXTV
CC
rises above
4.7V, the
internal regulator is turned off and an internal switch
closes, connecting the EXTV
CC
pin to the INTV
CC
pin
thereby supplying internal and MOSFET gate driving power
to the IC. The switch remains closed as long as the voltage
applied to EXTV
CC
remains above 4.5V. This allows the
MOSFET driver and control power to be derived from the
output during normal operation (4.7V < V
EXTVCC
< 7V) and
from the internal regulator when the output is out of
regulation (start-up, short-circuit). Do not apply greater
than 7V to the EXTV
CC
pin and ensure that EXTV
CC
< V
IN
+
0.3V when using the application circuits shown.
If an
external voltage source is applied to the EXTV
CC
pin when
the V
IN
supply is not present, a diode can be placed in
series with the LTC1709’s V
IN
pin and a Schottky diode
between the EXTV
CC
and the V
IN
pin, to prevent current
from backfeeding V
IN
.
Significant efficiency gains can be realized by powering
INTV
CC
from the output, since the V
IN
current resulting
from the driver and control currents will be scaled by the
ratio: (Duty Factor)/(Efficiency). For 5V regulators this
means connecting the EXTV
CC
pin directly to V
OUT
. How-
ever, for 3.3V and other lower voltage regulators, addi-
tional circuitry is required to derive INTV
CC
power from the
output.
The following list summarizes the four possible connec-
tions for EXTV
CC:
1. EXTV
CC
left open (or grounded). This will cause INTV
CC
to be powered from the internal 5V regulator resulting in
a significant efficiency penalty at high input voltages.
2. EXTV
CC
connected directly to V
OUT
. This is the normal
connection for a 5V regulator and provides the highest
efficiency.
3. EXTV
CC
connected to an external supply. If an external
supply is available in the 5V to 7V range, it may be used to
power EXTV
CC
providing it is compatible with the MOSFET
gate drive requirements.
4. EXTV
CC
connected to an output-derived boost network.
For 3.3V and other low voltage regulators, efficiency gains
can still be realized by connecting EXTV
CC
to an output-
derived voltage which has been boosted to greater than
4.7V but less than 7V. This can be done with either the
inductive boost winding as shown in Figure 5a or the
capacitive charge pump shown in Figure 5b. The charge
pump has the advantage of simple magnetics.
Topside MOSFET Driver Supply (C
B
,D
B
) (Refer to
Functional Diagram)
External bootstrap capacitors C
B1
and C
B2
connected to
the BOOST1 and BOOST2 pins supply the gate drive
voltages for the topside MOSFETs. Capacitor C
B
in the
Functional Diagram is charged though diode D
B
from
APPLICATIO S I FOR ATIO
WUU
U
1709 F05a
V
IN
TG1
N-CH
1N4148
N-CH
BG1
PGND
LTC1709
SW1
EXTV
CC
OPTIONAL EXTV
CC
CONNECTION
5V < V
SEC
< 7V
T1
R
SENSE
V
SEC
V
OUT
V
IN
+
C
IN
+
1µF
+
C
OUT
1709 F05b
V
IN
TG1
N-CH
N-CH
BG1
PGND
LTC1709
SW1
EXTV
CC
L1
R
SENSE
BAT85
BAT85
BAT85 0.22µF
V
OUT
V
IN
+
C
IN
+
+
C
OUT
VN2222LL
17
LTC1709-8/LTC1709-9
INTV
CC
when the SW pin is low. When the topside MOSFET
turns on, the driver places the C
B
voltage across the gate-
source of the desired MOSFET. This enhances the MOSFET
and turns on the topside switch. The switch node voltage,
SW, rises to V
IN
and the BOOST pin rises to V
IN
+ V
INTVCC
.
The value of the boost capacitor C
B
needs to be 30 to 100
times that of the total input capacitance of the topside
MOSFET(s). The reverse breakdown of D
B
must be greater
than V
IN(MAX).
The final arbiter when defining the best gate drive ampli-
tude level will be the input supply current. If a change is
made that decreases input current, the efficiency has
improved. If the input current does not change then the
efficiency has not changed either.
Output Voltage
The LTC1709 has a true remote voltage sense capablity.
The sensing connections should be returned from the load
back to the differential amplifier’s inputs through a com-
mon, tightly coupled pair of PC traces. The differential
amplifier corrects for DC drops in both the power and
ground paths. The differential amplifier output signal is
divided down and compared with the internal precision
0.8V voltage reference by the error amplifier.
Output Voltage Programming
The output voltage is digitally programmed as defined in
Table 1 using the VID0 to VID4 logic input pins. The VID
logic inputs program a precision, 0.25% internal feedback
resistive divider. The LTC1709-8 has an output voltage
range of 1.30V to 3.5V in 50mV and 100mV steps. The
LTC1709-9 has an output voltage range of 1.10V to 1.85V
in 25mV steps.
Between the ATTENOUT
pin and ground is a variable
resistor, R1, whose value is controlled by the five VID input
pins (VID0 to VID4). Another resistor, R2, between the
ATTENIN and the ATTENOUT pins completes the resistive
divider. The output voltage is thus set by the ratio of
(R1␣ +␣ R2) to R1.
APPLICATIO S I FOR ATIO
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Table 1. VID Output Voltage Programming
LTC1709-8 LTC1709-9
VID4 VID3 VID2 VID1 VID0 VRM8.4 VRM9.0
00000 2.05V 1.850V
00001 2.00V 1.825V
00010 1.95V 1.800V
00011 1.90V 1.775V
00100 1.85V 1.750V
00101 1.80V 1.725V
00110 1.75V 1.700V
00111 1.70V 1.675V
01000 1.65V 1.650V
01001 1.60V 1.625V
01010 1.55V 1.600V
01011 1.50V 1.575V
01100 1.45V 1.550V
01101 1.40V 1.525V
01110 1.35V 1.500V
01111 1.30V 1.475V
10000 3.50V 1.450V
10001 3.40V 1.425V
10010 3.30V 1.400V
10011 3.20V 1.375V
10100 3.10V 1.350V
10101 3.00V 1.325V
10110 2.90V 1.300V
10111 2.80V 1.275V
11000 2.70V 1.250V
11001 2.60V 1.225V
11010 2.50V 1.200V
11011 2.40V 1.175V
11100 2.30V 1.150V
11101 2.20V 1.125V
11110 2.10V 1.100V
11111No_CPU/ No_CPU/
Shutdown* Shutdown*
*Represents codes without a defined output voltage as specified in Intel
specifications. The LTC1709 interprets these codes as a valid input and
produces an output voltage as follows:
LTC1709-8 (11111) = 2V
LTC1709-9 (11111) = 1.075V
18
LTC1709-8/LTC1709-9
APPLICATIO S I FOR ATIO
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Figure 6. RUN/SS Pin Interfacing
The time for the output current to ramp up is then:
t
VV
A
CsFC
IRAMP SS SS
=
µ
()
315
12
125
.
.
./
By pulling the RUN/SS pin below 0.8V the LTC1709 is put
into low current shutdown (I
Q
< 40µA). The RUN/SS pins
can be driven directly from logic as shown in Figure 6.
Diode D1 in Figure 6 reduces the start delay but allows
C
SS
to ramp up slowly providing the soft-start function.
The RUN/SS pin has an internal 6V zener clamp (see
Functional Diagram).
3.3V OR 5V RUN/SS
V
IN
INTV
CC
RUN/SS
D1
D1*
C
SS
R
SS
*
C
SS
R
SS
*
170989 F06
*OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF
Fault Conditions: Overcurrent Latchoff
The RUN/SS pin also provides the ability to latch off the
controllers when an overcurrent condition is detected. The
RUN/SS capacitor, C
SS
, is used initially to limit the inrush
current of both controllers. After the controllers have been
started and been given adequate time to charge up the
output capacitors and provide full load current, the RUN/
SS capacitor is used for a short-circuit timer. If the output
voltage falls to less than 70% of its nominal value after C
SS
reaches 4.1V, C
SS
begins discharging on the assumption
that the output is in an overcurrent condition. If the
condition lasts for a long enough period as determined by
the size of the C
SS
, the controller will be shut down until the
RUN/SS pin voltage is recycled. If the overload occurs
during start-up, the time can be approximated by:
t
LO1
(C
SS
• 0.6V)/(1.2µA) = 5 • 10
5
(C
SS
)
Each VID digital input is pulled up by a 40k resistor in
series with a diode from V
BIAS
. Therefore, it must be
grounded to get a digital low input, and can be either
floated or connected to V
BIAS
to get a digital high input. The
series diode is used to prevent the digital inputs from
being damaged or clamped if they are driven higher than
V
BIAS
. The digital inputs accept CMOS voltage levels.
V
BIAS
is the supply voltage for the VID section. It is
normally connected to INTV
CC
but can be driven from
other sources. If it is driven from another source, that
source
must
be in the range of 2.7V to 5.5V and
must
be
alive prior to enabling the LTC1709.
Soft-Start/Run Function
The RUN/SS pin provides three functions: 1) Run/Shut-
down, 2) soft-start and 3) a defeatable short-circuit latchoff
timer. Soft-start reduces the input power sources’ surge
currents by gradually increasing the controller’s current
limit I
TH(MAX)
. The latchoff timer prevents very short,
extreme load transients from tripping the overcurrent
latch. A small pull-up current (>5µA) supplied to the RUN/
SS pin will prevent the overcurrent latch from operating.
The following explanation describes how the functions
operate.
An internal 1.2µA current source charges up the soft-start
capacitor, C
SS
.
When the voltage on RUN/SS reaches
1.5V, the controller is permitted to start operating. As the
voltage on RUN/SS increases from 1.5V to 3.0V, the
internal current limit is increased from 25mV/R
SENSE
to
75mV/R
SENSE
. The output current limit ramps up slowly,
taking an additional 1.4s/µF to reach full current. The
output current thus ramps up slowly, reducing the starting
surge current required from the input power supply. If
RUN/SS has been pulled all the way to ground there is a
delay before starting of approximately:
t
V
A
CsFC
DELAY SS SS
=
µ
()
15
12
125
.
.
./

LTC1709EG-8#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Hi Pwr PolyPhase DC/DC Controllers
Lifecycle:
New from this manufacturer.
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