PESD5V0S1BA_BB_BL_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 20 August 2009 6 of 15
NXP Semiconductors
PESD5V0S1BA/BB/BL
Low capacitance bidirectional ESD protection diodes
T
amb
= 25 °C
Fig 3. Peak pulse power dissipation as a function of
exponential time duration t
p
; typical values
Fig 4. Relative variation of peak pulse power as a
function of junction temperature; typical
values
T
amb
= 25 °C; f = 1 MHz
Fig 5. Diode capacitance as a function of reverse
voltage; typical values
Fig 6. Relative variation of reverse leakage current
as a function of junction temperature; typical
values
001aaa202
t
p
(µs)
110
4
10
3
10 10
2
10
2
10
3
P
pp
(W)
10
T
j
(°C)
0 20015050 100
001aaa193
0.4
0.8
1.2
P
PP
0
P
PP(25°C)
V
R
(V)
054231
001aaa203
30
26
34
38
C
d
(pF)
22
001aaa204
T
j
(°C)
75 150125100
10
1
10
2
10
1
I
RM(T
j
)
I
RM(T
j
=85°C)
PESD5V0S1BA_BB_BL_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 20 August 2009 7 of 15
NXP Semiconductors
PESD5V0S1BA/BB/BL
Low capacitance bidirectional ESD protection diodes
Fig 7. ESD clamping test setup and waveforms
006aaa056
50
R
Z
C
Z
PESD5V0S1Bx
vertical scale = 200 V/div
horizontal scale = 50 ns/div
unclamped +1 kV ESD voltage waveform
(IEC61000-4-2 network)
clamped +1 kV ESD voltage waveform
(IEC61000-4-2 network)
unclamped 1 kV ESD voltage waveform
(IEC61000-4-2 network)
clamped 1 kV ESD voltage waveform
(IEC61000-4-2 network)
vertical scale = 10 V/div
horizontal scale = 50 ns/div
vertical scale = 200 V/div
horizontal scale = 50 ns/div
vertical scale = 10 V/div
horizontal scale = 50 ns/div
GND
GND
GND
GND
450
RG 223/U
50 coax
ESD TESTER 4 GHz DIGITAL
OSCILLOSCOPE
10×
ATTENUATOR
IEC 61000-4-2 network
C
Z
= 150 pF; R
Z
= 330
PESD5V0S1BA_BB_BL_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 20 August 2009 8 of 15
NXP Semiconductors
PESD5V0S1BA/BB/BL
Low capacitance bidirectional ESD protection diodes
7. Application information
PESD5V0S1Bx series is designed for the protection of one bidirectional signal line from
the damage caused by ElectroStatic Discharge (ESD) and surge pulses. The devices may
be used on lines where the signal polarities are above and below ground. They provide a
surge capability of up to 130 W per line for a 8/20 µs waveform.
Circuit board layout and protection device placement:
Circuit board layout is critical for the suppression of ESD, EFT and surge transients.
The following guidelines are recommended:
1. Place the protection device as close to the input terminal or connector as possible.
2. The path length between the protection device and the protected line should be
minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protection conductors in parallel with unprotected conductor.
5. Minimize all printed-circuit board conductive loops including power and ground loops.
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer printed-circuit
boards, use ground vias.
Fig 8. Bidirectional protection of one signal line
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PESD5V0S1Bx
GND
signal line

PESD5V0S1BA/6F

Mfr. #:
Manufacturer:
Nexperia
Description:
TVS DIODE 5V 14V SOD323
Lifecycle:
New from this manufacturer.
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