250 MHz, Voltage Output,
Data Sheet
FEATURES
Simple: basic function is W = XY + Z
Complete: minimal external components required
Very fast: Settles to 0.1% of full scale (FS) in 20 ns
DC-coupled voltage output simplifies use
High differential input impedance X, Y, and Z inputs
Low multiplier noise: 50 nV/√Hz
APPLICATIONS
Very fast multiplication, division, squaring
Wideband modulation and demodulation
Phase detection and measurement
Sinusoidal frequency doubling
Video gain control and keying
Voltage-controlled amplifiers and filters
GENERAL DESCRIPTION
The AD835 is a complete four-quadrant, voltage output analog
multiplier, fabricated on an advanced dielectrically isolated
complementary bipolar process. It generates the linear product
of its X and Y voltage inputs with a −3 dB output bandwidth of
250 MHz (a small signal rise time of 1 ns). Full-scale (−1 V to
+1 V) rise to fall times are 2.5 ns (with a standard R
L
of 150 Ω),
and the settling time to 0.1% under the same conditions is
typically 20 ns.
Its differential multiplication inputs (X, Y) and its summing
input (Z) are at high impedance. The low impedance output
voltage (W) can provide up to ±2.5 V and drive loads as low as
25 Ω. Normal operation is from ±5 V supplies.
Though providing state-of-the-art speed, the AD835 is simple
to use and versatile. For example, as well as permitting the
addition of a signal at the output, the Z input provides the
means to operate the AD835 with voltage gains up to about ×10.
In this capacity, the very low product noise of this multiplier
(50 nV/√Hz) makes it much more useful than earlier products.
The AD835 is available in an 8-lead PDIP package (N) and an
8-lead SOIC package (R) and is specified to operate over the
−40°C to +85°C industrial temperature range.
FUNCTIONAL BLOCK DIAGRAM
00883-001
X1
X2
X = X1 – X2
Z INPUT
Y = Y1 – Y2
AD835
W OUTPUT
Y1
Y2
XY XY + Z
X1
+
+
F
igure 1.
PRODUCT HIGHLIGHTS
1. The AD835 is the first monolithic 250 MHz, four-quadrant
voltage output multiplier.
2. Minimal external components are required to apply th
e
A
D835 to a variety of signal processing applications.
3. High input impedances (100 kΩ||2 pF) make signal source
loading negligible.
4. High output current capability allows low impedance load
s
t
o be driven.
5. State-of-the-art noise levels achieved through careful
device optimization and the use of a special low noise,
band gap voltage reference.
6. Designed to be easy to use and cost effective in applications
that require the use of hybrid or board-level solutions.
Re
v. E
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