UM10963 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
User manual Rev. 1 — 8 April 2016 6 of 15
NXP Semiconductors
UM10963
TEA1993DB1357 synchronous rectifier controller demo board
5. TEA1993DB1357 demo board setup
5.1 Connected at low-side SR
The TEA1993DB1357 demo board is incorporated in an existing flyback power supply.
Figure 4
shows the connection of the TEA1993DB1357 demo board to the secondary side
of a flyback controller board as low-side SR.
Figure 4(a) shows the configuration for SR low-side applications that include CC mode
(e.g. USB BC specification for an operation between 2 V and 5 V). When V
out
4.7 V, the
TEA1993TS uses the voltage on the XV pin as supply. The resulting voltage on the CAP
pin is typically 0.7 V below the voltage on the XV pin. It is used as supply voltage for the
gate drive output to the external MOSFET.
When V
out
< 4.7 V (CC mode), the TEA1993TS uses the pulsed voltage on the drain input
to generate the voltage for the CAP pin. When 0 V <V
out
< 4.7 V, the regulated voltage on
the CAP pin is 4.0 V (typical).
Figure 4
(b) shows the configuration for SR low-side application for CV mode only. V
out
must be 4 V. In this case, the CAP pin can be connected directly to the XV pin. The
result of connecting the CAP pin directly to the XV pin is 0.7 V additional gate drive
voltage compared to the configuration in Figure 4
(a). The additional gate drive voltage
drives the external MOSFET to a lower R
DSon
to achieve the best efficiency. The
maximum gate drive voltage is limited to 12 V.
Maximum voltage ratings for TEA1993TS pins:
• Pins XV and CAP: 38 V
• Pin DRAIN: 120 V
(1) Supply via DRAIN pin (2 V to 4 V)
(2) Supply via V
out
(> 4 V)
(1) Supply via V
out
(> 4 V)
a. Including Constant Current (CC) mode b. Constant Voltage (CV) mode only
Fig 4. TEA1993DB1357 demo board configuration with low-side rectification
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