UM10963 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved.
User manual Rev. 1 — 8 April 2016 8 of 15
NXP Semiconductors
UM10963
TEA1993DB1357 synchronous rectifier controller demo board
6. Schematic
Figure 6 shows the schematic diagram of the TEA1993DB1357 demo board. The board
incorporates the TEA1993TS SR controller and a power MOSFET. The TEA1993TS acts
as a controlled amplifier. The input is the voltage difference between the DRAIN and the
SOURCE pin. The corresponding gate driver signal is the output. The amplifier regulates
the source-to-drain voltage difference to 35 mV in the rectification phase.
To facilitate easy layout design for a single-sided board, resistors R1 and R2 are added.
They must be between 0 and 10 . For the fastest turn-off time, use the lowest value.
By default, the LFPAK MOSFET Q1 is mounted with a 0 gate resistor (R1). It is also
possible to mount a TO220 MOSFET Q2 with gate resistor R2. Capacitors C1 and C2 are
decoupling capacitors for the V
CC
of the TEA1993TS. Connect these capacitors close to
the IC.
To ensure sufficient charge power during the secondary stroke to drive the external
MOSFET, a value of 100 nF is used for capacitor C2. To prevent unwanted oscillation of
the V
CC
supply, capacitor C1 is added. A provision is made for snubber R3/C3. The
components are not mounted. However, if high-voltage spikes occur on the drain-source
connections of the MOSFETs, they can be added. To facilitate optimal configurations for
either the low-side or the high-side connection, jumpers JP1 and JP2 are added
(see the diagrams in Section 5
).
n.m. = not mounted
w. handle = with handle
Fig 6. TEA1993DB1357 demo board schematic
(
$:*
;9
-3
0&/
MXPSHU3 PPZKD
&$%*6
'
%$6
QP
&
Q)
9
&
S)
9
5
5
4
%8.<5(
4QP
3601536
ȍ
5
ȍ
QP
-3
*1'
;9
&$3
;9
'5$,1
6285&(
*$7(
0&/
MXPSHU3 PPZKD
(
$:*
'5$,1
6285&(
'5$,1