LT3724
19
3724fd
APPLICATIONS INFORMATION
Minimum On-Time Considerations
(Step-Down Converters)
Minimum on-time (t
TG(ON)
) is the least amount of time
that the LT3724 is capable of turning the MOSFET on and
then off again. It is determined by internal timing delays
and the gate charge of the MOSFET. Applications with high
input to output differential voltages operate at low duty
cycles and may approach this minimum on-time, typically
300nS. The LT3724 switching frequency is internally set to
200kHz, therefore, the minimum duty cycle of the MOSFET
switch is 6%. When the duty cycle needs to be less than
6% the output will stay regulated, but cycle skipping may
occur. Cycle skipping results in an increase in inductor
ripple current. If it is important that cycle skipping does
not occur, follow this guideline which takes into account
worst case f
SW
and t
TG(ON)
:
V
IN(MAX)
≤ 9 • V
OUT
This is only an issue for supplies with V
OUT
< 7V.
Figure 9. LT3724 Layout Diagram (See PCB Layout Checklist).
4
C
BOOST
R
SENSE
R
A
R
C
R2
R1
R
B
R
CSS
V
IN
–
V
IN
+
V
IN
SHDN
C
SS
BURST_EN
V
FB
V
C
SGND
BOOST
TG
SW
V
CC
PGND
SENSE
+
SENSE
–
+
–
L1
M1
D3
3724 F06
LT3724
1
3
5
6
7
8
16
15
14
12
11
10
9
D2
D1
C
VCC
C
IN
C
OUT
V
OUT
C
C2
C
C1
C
SS
17
