REVISION E 6/21/16
8521 DATA SHEET
15 Low Skew, 1-to-9, Differential-to-
HSTL Fanout Buffer
REVISION HISTORY SHEET
Rev Table Page Description of Change Date
B 3 Updated Figure 1 - CLK_EN Timing Diagram. 10/16/01
B 3 Updated Figure 1 - CLK_EN Timing Diagram. 11/1/01
C T4E 5 LVHSTL table - changed V
OH
maximum from 1.2V to 1.4V. 01/02/03
D
T2
T4B
2
4
8
9
Changed LVHSTL to HSTL throughout data sheet to conform with JEDEC termi-
nology.
Pin Characteristics table - changed CIN 4pF max. to 4pF typical.
LVCMOS table - changed VIH from 3.765V max. to VDD + 0.3V max.
Added Differential Input Interface section.
Added LVPECL Input Interface section.
7/16/03
DT7
4
9
14
Absolute Maximum Ratings - updated Output rating.
Updated LVPECL Clock Input Interface section.
Ordering Information - added “Lead-Free/Annealed” part number.
7/7/04
ET7 14
16
Updated datasheet’s header/footer with IDT from ICS.
Removed ICS prefi x from Part/Order Number column.
Added Contact Page.
7/25/10
E
T7 14 Ordering Information Table - deleted non-lead free marking, added lead-free
marking.
Updated datasheet’s header/footer.
8/24/12
E
Updated datasheet format.
6/12/15
E
Product Discontinuaton Notice - Last time buy expires May 6, 2017.
PDN CQ-16-01
6/21/16
