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LTC3025IDC#TRMPBF

P1-P3P4-P6P7-P9P10-P12
LTC3025
10
3025fd
PACKAGE DESCRIPTION
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703 Rev B)
2.00 p0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WCCD-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 p 0.10
BOTTOM VIEW—EXPOSED PAD
0.56 p 0.05
(2 SIDES)
0.75 p0.05
R = 0.125
TYP
R = 0.05
TYP
1.37 p0.05
(2 SIDES)
1
3
64
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DC6) DFN REV B 1309
0.25 p 0.05
0.50 BSC
0.25 p 0.05
1.42 p0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.61 p0.05
(2 SIDES)
1.15 p0.05
0.70 p0.05
2.55 p0.05
PACKAGE
OUTLINE
0.50 BSC
PIN 1 NOTCH
R = 0.20 OR
0.25 s 45o
CHAMFER
LTC3025
11
3025fd
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
C 07/10 Added (Note 3) notation to “The
l denotes” statement in Electrical Characteristics section
Updated Pin 7 in Pin Functions
Added “V
OUT
Start-Up and Supply Sequencing” section
Updated Related Parts section
2, 3
6
9
12
D 01/11 Updated graph G11 4
(Revision history begins at Rev C)
LTC3025
12
3025fd
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2004
LT 0111 REV D • PRINTED IN USA
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT
®
1761 100mA, Low Noise Micropower, LDO V
IN
: 1.8V to 20V, V
OUT(MIN)
= 1.22V, V
DO
= 0.30V, I
Q
= 20µA, I
SD
< 1µA,
V
OUT
= Adj, 1.5V, 1.8V, 2V, 2.5V, 2.8V, 3V, 3.3V, 5V, ThinSOT
TM
Package.
Low Noise < 20µV
RMSP-P
, Stable with 1µF Ceramic Capacitors
LT1762 150mA, Low Noise Micropower LDO V
IN
: 1.8V to 20V, V
OUT(MIN)
= 1.22V, V
DO
= 0.30V, I
Q
= 25µA, I
SD
< 1µA,
V
OUT
= Adj, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20µV
RMSP-P
LTC1844 150mA, Very Low Dropout LDO V
IN
: 1.6V to 6.5V, V
OUT(MIN)
= 1.25V, V
DO
= 0.08V, I
Q
= 40µA, I
SD
< 1µA,
V
OUT
= Adj, 1.5V, 1.8V, 2.5V, 2.8V, 3.3V, ThinSOT Package.
Low Noise < 30µV
RMSP-P
, Stable with 1µF Ceramic Capacitors
LT1962 300mA, Low Noise Micropower LDO V
IN
: 1.8V to 20V, V
OUT(MIN)
= 1.22V, V
DO
= 0.27V, I
Q
= 30µA, I
SD
< 1µA,
V
OUT
= 1.5, 1.8V, 2.5V, 3V, 3.3V, 5V, MS8 Package. Low Noise < 20µV
RMSP-P
LT1964 200mA, Low Noise Micropower, Negative LDO V
IN
: –0.9V to –20V, V
OUT(MIN)
= –1.21V, V
DO
= 0.34V, I
Q
= 30µA, I
SD
< 3µA,
V
OUT
= Adj, –5V, ThinSOT Package.
Low Noise < 30µV
RMSP-P
, Stable with Ceramic Capacitors
LT3020 100mA, Low Voltage, VLDO V
IN
: 0.9V to 10V, V
OUT(MIN)
= 0.20V, V
DO
= 0.15V, I
Q
= 120µA, I
SD
< 3µA,
V
OUT
= Adj, DFN, MS8 Package
OUTPUT CURRENT (mA)
EFFICIENCY (%)
100
90
80
70
60
50
40
0.1 10 100 1000
3025 TA03
1
V
OUT
= 1.5V
V
OUT
= 1.2V
TYPICAL APPLICATION
High Effi ciency 1.5V Step-Down Converter with Effi cient 1.2V VLDO Output
LTC3025
BIAS
0.1µF
1µF
IN
SHDN
OUT
80.6k
V
OUT
= 1.2V
I
OUT
≤ 300mA
40.2k
3025 TA02
ADJ
GND
1
3
6
4
5
2
OFF ON
OFF ON
V
IN
C
IN
**
4.7µF
CER
V
IN
2.7V
TO 5.5V
*
**
†
LTC3406-1.5
RUN
2.2µH*
MURA
TA LQH32CN2R2M33
TAIYO YUDEN JMK212BJ475MG
TAIYO YUDEN JMK316BJ106ML
SW
4
1
3
5
C
OUT
+
10µF
CER
V
OUT
1.5V
600mA
V
OUT
GND
Effi ciency vs Output Current
P1-P3P4-P6P7-P9P10-P12

LTC3025IDC#TRMPBF

Mfr. #:
Buy LTC3025IDC#TRMPBF
Manufacturer:
Analog Devices / Linear Technology
Description:
LDO Voltage Regulators 300mA Micropower VLDO Linear Regulator
Lifecycle:
New from this manufacturer.
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