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TLE6220GPAUMA2

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
Data Sheet TLE 6220 GP
V2.2 Page 2009-11-18
4
Electrical Characteristics
Parameter and Conditions Symbol Values Unit
V
S
= 4.5 to 5.5 V ; T
j
= - 40 °C to + 150 °C ; Reset = H
(unless otherwise specified)
min typ max
1. Power Supply, Reset
Supply Voltage
4
V
S
4.5 -- 5.5
V
Supply Current
5
I
S
--
1 2 mA
Minimum Reset Duration
(After a reset all parallel inputs are ORed with the SPI
data bits)
t
Reset,min
10
µs
2. Power Outputs
ON Resistance V
S
= 5 V; I
D
= 1 A T
J
= 25°C
T
J
= 150°C
R
DS(ON)
--
--
0.32
--
0.4
0.7
Ω
Output Clamping Voltage output OFF V
DS(AZ)
45
53
60 V
Current Limit I
D(lim)
3 4.5 6 A
Output Leakage Current V
RESET
= L
I
D(lkg)
-- --
10 µA
Turn-On Time I
D
= 1 A, resistive load t
ON
--
5 10 µs
Turn-Off Time I
D
= 1 A, resistive load t
OFF
--
5 10 µs
3. Digital Inputs
Input Low Voltage V
INL
- 0.3
--
1.0 V
Input High Voltage V
INH
2.0
--
VS+0.3
V
Input Voltage Hysteresis V
INHys
50 100
200
mV
Input Pull Down/Up Current (IN1 ... IN4) I
IN(1..4)
20 50 100 µA
PRG,
RESET
Pull Up Current I
IN(PRG,Res)
20 50 100 µA
Input Pull Down Current (SI, SCLK) I
IN(SI,SCLK)
10 20 50 µA
Input Pull Up Current (
CS
) I
IN(CS)
10 20 50 µA
4. Digital Outputs (SO,
FAULT
)
SO High State Output Voltage I
SOH
= 2 mA V
SOH
V
S
- 0.4
-- -- V
SO Low State Output Voltage I
SOL
= 2.5 mA V
SOL
-- -- 0.4 V
Output Tri-state Leakage Current
CS
= H, 0 ≤ V
SO
≤ V
S
I
SOlkg
-10 0 10 µA
FAULT
Output Low Voltage I
FAULT
= 1.6 mA V
FAULTL
-- --
0.4 V
Current Limitation; Overload Threshold Current I
D(lim) 1...4
3 4.5 6 A
Overtemperature Shutdown Threshold
Hysteresis
6
T
th(sd)
T
hys
170
--
--
10
200
--
°C
K
4
For V
S
< 4.5V the power stages are switched according the input signals and data bits or are definitely switched
off. This undervoltage reset gets active at V
S
= 3V (typ. value) and is guaranteed by design.
5
If Reset = L the supply current is reduced to typ. 20µA
6
This parameter will not be tested but guaranteed by design
Data Sheet TLE 6220 GP
V2.2 Page 2009-11-18
5
Electrical Characteristics cont.
Parameter and Conditions Symbol Values Unit
V
S
= 4.5 to 5.5 V ; T
j
= - 40 °C to + 150 °C ; Reset = H
(unless otherwise specified)
min typ max
5. Diagnostic Functions
Open Load Detection Voltage V
DS(OL)
V
S
-2.5
V
S
-2
V
S
-1.3
V
Output Pull Down Current I
PD(OL)
50 90 150 µA
Fault Delay Time t
d(fault)
50 110 200 µs
Short to Ground Detection Voltage V
DS(SHG)
V
S
–3.3
V
S
-2.9
V
S
-2.5
V
Short to Ground Detection Current I
SHG
-50 -100 -150 µA
6. SPI-Timing
Serial Clock Frequency (depending on SO load) f
SCK
DC -- 5 MHz
Serial Clock Period (1/fclk) t
p(SCK)
200 -- -- ns
Serial Clock High Time t
SCKH
50 -- -- ns
Serial Clock Low Time t
SCKL
50 -- -- ns
Enable Lead Time (falling edge of
CS
to rising edge of
CLK)
t
lead
250 -- -- ns
Enable Lag Time (falling edge of CLK to rising edge of
CS
)
t
lag
250 --- -- ns
Data Setup Time (required time SI to falling of CLK) t
SU
20 -- -- ns
Data Hold Time (falling edge of CLK to SI) t
H
20 -- -- ns
Disable Time @ C
L
= 50 pF
8
t
DIS
-- -- 150 ns
Transfer Delay Time
7
(
CS
high time between two accesses)
t
dt
200 -- -- ns
Data Valid Time C
L
= 50 pF
C
L
= 100 pF
8
C
L
= 220 pF
8
t
valid
--
--
--
--
--
--
110
120
150
ns
7
This time is necessary between two write accesses. To get the correct diagnostic information, the transfer delay
time has to be extended to the maximum fault delay time t
d(fault)max
= 200µs.
8
This parameter will not be tested but guaranteed by design
Data Sheet TLE 6220 GP
V2.2 Page 2009-11-18
6
Functional Description
The TLE 6220 GP is an quad-low-side power switch which provides a serial peripheral inter-
face (SPI) to control the 4 power DMOS switches, as well as diagnostic feedback. The power
transistors are protected against short to V
BB
,
overload, overtemperature and against over-
voltage by an active zener clamp.
The diagnostic logic recognises a fault condition which can be read out via the serial diagnos-
tic output (SO).
Circuit Description
Power Transistor Protection Functions
9)
Each of the four output stages has its own zener clamp, which causes a voltage limitation at
the power transistor when solenoid loads are switched off. The outputs are provided with a
current limitation set to a minimum of 3 A. The continuous current for each channel is 1A (all
channels ON; depending on cooling).
Each output is protected by embedded protection functions. In the event of an overload or
short to supply, the current is internally limited and the corresponding bit combination is set
(early warning). If this operation leads to an overtemperature condition, a second protection
level (about 170 °C) will change the output into a low duty cycle PWM (selective thermal shut-
down with restart) to prevent critical chip temperatures.
SPI Signal Description
CS
- Chip Select. The system microcontroller selects the TLE 6220 GP by means of the
CS
pin. Whenever the pin is in a logic low state, data can be transferred from the µC and vice
versa.
CS
High to Low transition: - Diagnostic status information is transferred from the power
outputs into the shift register.
- Serial input data can be clocked in from then on.
- SO changes from high impedance state to logic high or low
state corresponding to the SO bits.
CS
Low to High transition: - Transfer of SI bits from shift register into output buffers
- Reset of diagnosis register.
To avoid any false clocking the serial clock input pin SCLK should be logic low state during
high to low transition of
CS
. When
CS
is in a logic high state, any signals at the SCLK and SI
pins are ignored and SO is forced into a high impedance state.
9
)
The integrated protection functions prevent an IC destruction under fault conditions and may not be used in normal operation or permanently.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19

TLE6220GPAUMA2

Mfr. #:
Buy TLE6220GPAUMA2
Manufacturer:
Infineon Technologies
Description:
Power Switch ICs - Power Distribution Smart Low Side 4 Ch 45 V 3 W
Lifecycle:
New from this manufacturer.
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