TLE6220GPAUMA2 Datasheet TLE6220GPAUMA2 | P7-P9

Data Sheet TLE 6220 GP

V2.2 Page 2009-11-18

SCLK - Serial Clock. The system clock pin clocks the internal shift register of the TLE

6220 GP. The serial input (SI) accepts data into the input shift register on the falling edge of

SCLK while the serial output (SO) shifts diagnostic information out of the shift register on the

rising edge of serial clock. It is essential that the SCLK pin is in a logic low state whenever

chip select

makes any transition.

SI - Serial Input. Serial data bits are shifted in at this pin, the most significant bit first. SI infor-

mation is read in on the falling edge of SCLK. Input data is latched in the shift register and

then transferred to the control buffer of the output stages.

The input data consists of one byte, made up of four control bits and four data bits. The con-

trol word is used to program the device, to operate it in a certain mode as well as providing

diagnostic information (see page 11). The four data bits contain the input information for the

four channels, and are high active.

SO - Serial Output. Diagnostic data bits are shifted out serially at this pin, the most significant

bit first. SO is in a high impedance state until the

pin goes to a logic low state. New diag-

nostic data will appear at the SO pin following the rising edge of SCLK.

RESET

- Reset pin. If the reset pin is in a logic low state, it clears the SPI shift register and

switches all outputs OFF. An internal pull-up structure is provided on chip. As long as the re-

set pin is low the device is in low quiescent current mode and the supply current is reduced to

typ. 20µA.

Output Stage Control

The four outputs of the TLE 6220 GP can either be controlled in parallel (IN1...IN4), or via the

Serial Peripheral Interface (SPI).

Parallel Control

A Boolean operation (either AND or OR) is performed on each of the parallel inputs and re-

spective SPI data bits, in order to determine the states of the respective outputs. The type of

Boolean operation performed is programmed via the serial interface.

The parallel inputs are high or low active depending on the PRG pin. If the parallel input pins

are not connected (independent of high or low activity) it is guaranteed that the outputs 1 to 4

are switched OFF. PRG pin itself is internally pulled up when it is not connected.

PRG - Program pin. PRG = High (V

): Parallel inputs Channel 1 to 4 are high active

PRG = Low (GND): Parallel inputs Channel 1 to 4 are low active.

Data Sheet TLE 6220 GP

V2.2 Page 2009-11-18

Serial Control of the Outputs: SPI protocol

Each output is independently controlled by an output latch and a common reset line, which

disables all four outputs. The Serial Input (SI) is read on the falling edge of the serial clock. A

logic high input 'data bit' turns the respective output channel ON, a logic low 'data bit' turns it

OFF.

must be low whilst shifting all the serial data into the device. A low-to-high transition

transfers the serial data input bits to the output control buffer.

As mentioned above, the serial input byte consists of a 4 bit control word and a 4 bit data

word. Via the control word, the specific mode of the device is programmable.

MSB LSB

321321

Bits DataBits Control

DDDDCCCC : Serial input byte

Five specific control words are recognised, having the following functions:

No. Serial Input Byte Function

LLLL XXXX Only 'Full Diagnosis' performed. No change to output states.

HHLL XXXX State of four parallel inputs and '1-bit Diagnosis' outputted.

HLHL XXXX Echo-function of SPI; SI direct connected to SO

LLHH DDDD IN1...4 and serial data bits 'OR'ed. 'Full Diagnosis' performed.

HHHH DDDD

IN1...4 and serial data bits 'AND'ed. 'Full Diagnosis' performed.

Note: 'X' means 'don't care', because this bit will be ignored

'D' represents the data bit, either being H (=ON) or L (=OFF)

1. LLLL XXXX - Diagnosis only

By clocking in this control byte, it is possible to get pure diagnostic information (two bits per

channel) in accordance with Figure 1 (page 11). The data bits are ignored, so that the state of

the outputs are not influenced. This command is only active once unless the next control com-

mand is again "Diagnosis only".

2. HHLL XXXX - Reading back of input, and ‘1-bit Diagnosis’

If the TLE 6220 GP is used as bare die in a hybrid application, it is necessary to know if

proper connections exist between the µC-port and parallel inputs. By entering ‘HHLL’ as the

control word, the first four bits of the SO give the state of the parallel inputs, depending on the

µC signals. By comparing the four IN-bits with the corresponding µC-port signal, the neces-

sary connection between the µC and the TLE 6220 can be verified - i.e. ‘read back of the in-

puts’.

The second 4-bit word fed out at the serial output contains ‘1-bit’ fault information of the out-

puts ( H = no fault, L = fault ). In the expression given below for the output byte, ‘FX’ is the

fault bit for channel X.

MSB LSB

IN4 IN3 IN2 IN1 F4 F3 F2 F1 : Serial Output byte

Data Sheet TLE 6220 GP

V2.2 Page 2009-11-18

SI H H L L X X X X

SO H H H H H H H H

SI H H H H L H H L

IN4 IN3 IN2 IN1 F4 F3 F2 F1

SI command

: No change of the

output state; reading back of

inputs and 1bit diagnosis

SO diagnosis

: No fault, normal

function

SI H H H H L L L L

SO H H H H H H H H

SI command: AND-Operation;

Ch1 and 4 OFF, Ch2 and 3 ON.

SO diagnosis

: State of four parallel

inputs and 1 bit diagnosis performed

SI command: AND-Operation and

all channels OFF.

SO diagnosis: No fault, normal

function

3. HLHL XXXX - Echo-function of SPI

To check the proper function of the serial interface the TLE 6220 GP provides a "SPI Echo

Function". By entering HLHL as control word, SI and SO are connected during the next

period. By comparing the bits clocked in with the serial output bits, the proper function of the

SPI interface can be verified. This internal loop is only closed once (for one

period).

SI H L H L X X X X

SO H H H H L H H H

SI SO

SI command: No change of the

output states; Echo function of SPI

SO diagnosis: Open load condition

at channel 2, other channels ok.

SI word

Echo-function of SPI

, i.e. SI

directly connected to SO.

SI information

will be accepted

during this cycle

and the

outputs set accordingly after

chip select rising edge

4. LLHH DDDD - OR operation, and ‘full diagnosis’

With LLHH as the control word, each of the input signals IN1...IN4 are 'OR'ed with the corre-

sponding data bits (DDDD).

≥

Output

Driver

IN 1...4

Serial Input,

data bits 0...3

This OR operation enables the serial interface to switch the channel ON, even though the cor-

responding parallel input might be in the off state.

⇒ SPI Priority for ON-State

Also parallel control of the outputs is possible without an SPI input.

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TLE6220GPAUMA2

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