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NCR100-8LR
P1-P3
P4-P6
P7-P9
P10-P12
P13-P14
NXP Semiconductors
NCR100-8L
SCR
NCR100-8L
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
8 April 2015
6 / 13
9.
Thermal characteristics
T
able 6.
Thermal characteristics
Symbol
Parameter
Conditions
Min
T
yp
Max
Unit
R
th(j-sp)
thermal resistance
from junction to solder
point
Fig. 6
-
-
23
K/W
R
th(j-a)
thermal resistance
from junction to
ambient
Device mounted on an FR4 PCB,
single-sided copper
, tin-plated,
mounting pad for anode 6 sq cm.
-
105
-
K/W
aaa-017092
1
10
2
10
-1
10
Z
th(j-sp)
(K/W)
10
-2
t
p
(s)
10
-5
1
10
10
-1
10
-2
10
-4
10
-3
t
p
t
p
T
P
t
T
d =
Fig. 6.
T
ransient thermal impedance from junction to solder point as a function of pulse duration
NXP Semiconductors
NCR100-8L
SCR
NCR100-8L
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
8 April 2015
7 / 13
10.
Characteristics
T
able 7.
Characteristics
Symbol
Parameter
Conditions
Min
T
yp
Max
Unit
Static characteristics
I
GT
gate trigger current
V
D
= 12 V; I
T
= 10 mA; T
j
= 25 °C;
Fig. 7
15
-
50
µA
I
L
latching current
V
D
= 12 V; I
G
= 0.5 mA; R
GK
= 1 kΩ;
T
j
= 25 °C;
Fig. 8
-
-
6
mA
I
H
holding current
V
D
= 12 V; R
GK
= 1 kΩ; T
j
= 25 °C;
Fig. 9
-
-
3
mA
V
T
on-state voltage
I
T
= 1.2 A; T
j
= 25 °C;
Fig. 10
-
1.25
1.7
V
V
D
= 12 V; I
T
= 10 mA; T
j
= 25 °C;
Fig. 1
1
-
0.5
0.8
V
V
GT
gate trigger voltage
V
D
= 400 V; I
T
= 10 mA; T
j
= 125 °C;
Fig. 1
1
0.3
0.5
-
V
I
D
off-state current
V
D
= 600 V; T
j
= 125 °C; R
GK
= 1 kΩ
-
0.05
0.1
mA
I
R
reverse current
V
R
= 600 V; T
j
= 125 °C; R
GK
= 1 kΩ
-
0.05
0.1
mA
Dynamic characteristics
dV
D
/dt
rate of rise of off-state
voltage
V
DM
= 402 V; T
j
= 125 °C; R
GK
= 1 kΩ;
exponential waveform; (V
DM
= 67% of
V
DRM
)
100
-
-
V/µs
t
gt
gate-controlled turn-on
time
I
TM
= 0.8 A; V
D
= 600 V; I
G
= 10 mA;
dI
G
/dt = 0.1 A/µs; T
j
= 25 °C
-
2
-
µs
t
q
commutated turn-off
time
V
DM
= 402 V; T
j
= 125 °C; I
TM
= 0.8 A;
V
R
= 35 V; (dI
T
/dt)
M
= 30 A/µs; dV
D
/
dt = 2 V/µs; R
GK
= 1 kΩ
-
100
-
µs
NXP Semiconductors
NCR100-8L
SCR
NCR100-8L
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved
Product data sheet
8 April 2015
8 / 13
T
j
(°C)
-50
150
100
0
50
aaa-017168
1
2
3
0
I
GT
I
GT(25°C)
Fig. 7.
Normalized gate trigger current as a function of
junction temperature
T
j
(°C)
-50
150
100
0
50
aaa-017169
1
2
3
0
I
L
I
L(25°C)
Fig. 8.
Normalized latching current as a function of
junction temperature
T
j
(°C)
-50
150
100
0
50
aaa-017170
1
2
3
0
I
H
I
H(25°C)
Fig. 9.
Normalized holding current as a function of
junction temperature
0
4
3
1
2
aaa-017171
2
3
1
4
5
0
V
T
(V)
I
T
(A)
(2)
(3)
(1)
V
o
= 1.173 V; R
s
= 0.216 Ω
(1) T
j
= 125 °C; typical values
(2) T
j
= 25 °C; maximum values
(3) T
j
= 125 °C; maximum values
Fig. 10.
On-state current as a function of on-state
voltage
P1-P3
P4-P6
P7-P9
P10-P12
P13-P14
NCR100-8LR
Mfr. #:
Buy NCR100-8LR
Manufacturer:
WeEn Semiconductors
Description:
NCR100-8L/TO-236AB/REEL 7" Q3
Lifecycle:
New from this manufacturer.
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NCR100-8LR