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74AHCT273D-Q100J
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P20
74AHC_AHCT273_Q1
00
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 2013. All rights reserv
e
d.
Product data sheet
Rev
. 1 — 27 March
2013
12 of 19
NXP Semiconductors
74AHC273-Q100; 74AHCT273-Q100
Oct
al D-type flip-flop with re
set; positive-edge t
rigger
T
est dat
a is given in
T
able 9
.
Definitions test circuit:
R
T
= termination resistance should be equal to output impedance Z
o
of the pulse generator
.
C
L
= load capacitance including jig and probe capacitance.
Fig 10.
T
est
circuit for measuring s
witching times
001aah768
t
W
t
W
t
r
t
r
t
f
V
M
V
I
negative
pulse
GND
V
I
positive
pulse
GND
10 %
90 %
90 %
10 %
V
M
V
M
V
M
t
f
V
CC
DUT
R
T
V
I
V
O
C
L
G
T
able 9.
T
est dat
a
Ty
p
e
Input
Load
Te
s
t
V
I
t
r
, t
f
C
L
74AHC273-Q100
V
CC
3.0 ns
15 pF
,
50 pF
t
PLH
, t
PHL
74AHCT273-Q100
3.0 V
3.0 ns
15 pF
, 50 pF
t
PLH
, t
PHL
74AHC_AHCT273_Q1
00
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 2013. All rights reserv
e
d.
Product data sheet
Rev
. 1 — 27 March
2013
13 of 19
NXP Semiconductors
74AHC273-Q100; 74AHCT273-Q100
Oct
al D-type flip-flop with re
set; positive-edge t
rigger
12. Package
outline
Fig 1
1.
Package
outline SOT163-1 (SO2
0)
UNIT
A
max.
A
1
A
2
A
3
b
p
cD
(1)
E
(1)
(1)
eH
E
LL
p
Q
Z
y
w
v
θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
inches
2.65
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
1.27
10.65
10.00
1.1
1.0
0.9
0.4
8
0
o
o
0.25
0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.1
0.4
SOT163-1
10
20
w
M
b
p
detail X
Z
e
11
1
D
y
0.25
075E04
MS-013
pin 1 index
0.1
0.012
0.004
0.096
0.089
0.019
0.014
0.013
0.009
0.51
0.49
0.30
0.29
0.05
1.4
0.055
0.419
0.394
0.043
0.039
0.035
0.016
0.01
0.25
0.01
0.004
0.043
0.016
0.01
0
5
10 mm
scale
X
θ
A
A
1
A
2
H
E
L
p
Q
E
c
L
v
M
A
(A )
3
A
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
99-12-27
03-02-19
74AHC_AHCT273_Q1
00
All informatio
n provided in thi
s document is su
bject to legal
disclaimers.
© NXP B.V
. 2013. All rights reserv
e
d.
Product data sheet
Rev
. 1 — 27 March
2013
14 of 19
NXP Semiconductors
74AHC273-Q100; 74AHCT273-Q100
Oct
al D-type flip-flop with re
set; positive-edge t
rigger
Fig 12.
Package ou
tline SOT360-1 (TSSOP20)
UNIT
A
1
A
2
A
3
b
p
cD
(1)
E
(2)
(1)
eH
E
LL
p
QZ
y
w
v
θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
JEDEC
JEITA
mm
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
6.6
6.4
4.5
4.3
0.65
6.6
6.2
0.4
0.3
0.5
0.2
8
0
o
o
0.13
0.1
0.2
1
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT360-1
MO-153
99-12-27
03-02-19
w
M
b
p
D
Z
e
0.25
11
0
20
11
pin 1 index
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v
M
A
X
A
y
0
2.5
5 mm
scale
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
A
max.
1.1
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P20
74AHCT273D-Q100J
Mfr. #:
Buy 74AHCT273D-Q100J
Manufacturer:
Nexperia
Description:
Flip Flops 74AHCT273D-Q100/SO20/REEL 13
Lifecycle:
New from this manufacturer.
Delivery:
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