74AHC_AHCT273_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 1 — 27 March 2013 4 of 19
NXP Semiconductors
74AHC273-Q100; 74AHCT273-Q100
Octal D-type flip-flop with reset; positive-edge trigger
5. Pinning information
5.1 Pinning
5.2 Pin description
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration SO20 and TSSOP20 Fig 6. Pin configuration DHVQFN20
74AHC273-Q100
74AHCT273-Q100
MR V
CC
Q0 Q7
D0 D7
D1 D6
Q1 Q6
Q2 Q5
D2 D5
D3 D4
Q3 Q4
GND CP
aaa-006756
1
2
3
4
5
6
7
8
9
10
12
11
14
13
16
15
18
17
20
19
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4
'
4
'
' '
4 4
4 4
' '
' '
4 4
*1'
&3
05
9
&&
*1'
Table 2. Pin description
Symbol Pin Description
MR
1 master reset input (active LOW)
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 2, 5, 6, 9, 12, 15, 16, 19 flip-flop output
D0, D1, D2, D3, D4, D5, D6, D7 3, 4, 7, 8, 13, 14, 17, 18 data input
GND 10 ground (0 V)
CP 11 clock input (LOW-to-HIGH edge-triggered)
V
CC
20 supply voltage
