CY28410-2
Document #: 38-07747 Rev *.* Page 13 of 17
T
PERIODAbs
100-MHz SRCT and SRCC Absolute
Period
Measured at crossing point V
OX
10.12800 9.872001 ns
T
PERIODSSAbs
100-MHz SRCT and SRCC Absolute
Period, SSC
Measured at crossing point V
OX
9.872001 10.17827 ns
T
SKEW
SRC Skew Measured at crossing point V
OX
250 ps
T
CCJ
SRCT/C Cycle to Cycle Jitter Measured at crossing point V
OX
125 ps
L
ACC
SRCT/C Long Term Accuracy Measured at crossing point V
OX
300 ppm
T
R
/ T
F
SRCT and SRCC Rise and Fall Times Measured from V
OL
= 0.175 to
V
OH
= 0.525V
175 1100 ps
T
RFM
Rise/Fall Matching Determined as a fraction of
2*(T
R
– T
F
)/(T
R
+ T
F
)
–20%
T
R
Rise Time Variation 125 ps
T
F
Fall Time Variation 125 ps
V
HIGH
Voltage High Math averages Figure 7 660 850 mV
V
LOW
Voltage Low Math averages Figure 7 –150 mV
V
OX
Crossing Point Voltage at 0.7V Swing 250 550 mV
V
OVS
Maximum Overshoot Voltage V
HIGH
+
0.3
V
V
UDS
Minimum Undershoot Voltage –0.3 V
V
RB
Ring Back Voltage See Figure 7. Measure SE 0.2 V
PCI/PCIF
T
DC
PCI Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Spread Disabled PCIF/PCI Period Measurement at 1.5V 29.99100 30.00900 ns
T
PERIODSS
Spread Enabled PCIF/PCI Period,
SSC
Measurement at 1.5V 29.9910 30.15980 ns
T
PERIODAbs
Spread Disabled PCIF/PCI Period Measurement at 1.5V 29.49100 30.50900 ns
T
PERIODSSAbs
Spread Enabled PCIF/PCI Period,
SSC
Measurement at 1.5V 29.49100 30.65980 ns
T
HIGH
PCIF and PCI high time Measurement at 2.4V 11.5 ns
T
LOW
PCIF and PCI low time Measurement at 0.4V 11.5 ns
T
R
/ T
F
PCIF and PCI rise and fall times Measured between 0.8V and 2.0V 0.5 2.0 ns
T
SKEW
Any PCI clock to Any PCI clock Skew Measurement at 1.5V 500 ps
T
CCJ
PCIF and PCI Cycle to Cycle Jitter Measurement at 1.5V 500 ps
DOT
T
DC
DOT96T and DOT96C Duty Cycle Measured at crossing point V
OX
45 55 %
T
PERIOD
DOT96T and DOT96C Period Measured at crossing point V
OX
10.41354 10.41979 ns
T
PERIODAbs
DOT96T and DOT96C Absolute
Period
Measured at crossing point V
OX
10.16354 10.66979 ns
T
CCJ
DOT96T/C Cycle to Cycle Jitter Measured at crossing point V
OX
250 ps
L
ACC
DOT96T/C Long Term Accuracy Measured at crossing point V
OX
100 ppm
T
R
/ T
F
DOT96T and DOT96C Rise and Fall
Times
Measured from V
OL
= 0.175 to
V
OH
= 0.525V
175 1100 ps
T
RFM
Rise/Fall Matching Determined as a fraction of
2*(T
R
– T
F
)/(T
R
+ T
F
)
–20%
T
R
Rise Time Variation 125 ps
T
F
Fall Time Variation 125 ps
V
HIGH
Voltage High Math averages Figure 7 660 850 mV
AC Electrical Specifications (continued)
Parameter Description Condition Min. Max. Unit
CY28410-2
Document #: 38-07747 Rev *.* Page 14 of 17
Test and Measurement Set-up
For Differential CPU, SRC and DOT96 Output Signals
The following diagram shows the test load configuration for the
differential CPU and SRC outputs.
V
LOW
Voltage Low Math averages Figure 7 –150 mV
V
OX
Crossing Point Voltage at 0.7V Swing 250 550 mV
V
OVS
Maximum Overshoot Voltage V
HIGH
+
0.3
V
V
UDS
Minimum Undershoot Voltage –0.3 V
V
RB
Ring Back Voltage See Figure 7. Measure SE 0.2 V
USB
T
DC
Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Period Measurement at 1.5V 20.83125 20.83542 ns
T
PERIODAbs
Absolute Period Measurement at 1.5V 20.48125 21.18542 ns
T
HIGH
USB high time Measurement at 2.4V 8.094 10.036 ns
T
LOW
USB low time Measurement at 0.4V 7.694 9.836 ns
T
R
/ T
F
Rise and Fall Times Measured between 0.8V and 2.0V 0.475 1.4 ns
T
CCJ
Cycle to Cycle Jitter Measurement at 1.5V 350 ps
L
ACC
USB Long Term Accuracy 100 ppm
REF
T
DC
REF Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
REF Period Measurement at 1.5V 69.8203 69.8622 ns
T
PERIODAbs
REF Absolute Period Measurement at 1.5V 68.82033 70.86224 ns
T
R
/ T
F
REF Rise and Fall Times Measured between 0.8V and 2.0V 0.35 2.0 V/ns
T
CCJ
REF Cycle to Cycle Jitter Measurement at 1.5V 1000 ps
ENABLE/DISABLE and SET-UP
T
STABLE
Clock Stabilization from Power-up 1.8 ms
T
SS
Stopclock Set-up Time 10.0 ns
T
SH
Stopclock Hold Time 0 ns
AC Electrical Specifications (continued)
Parameter Description Condition Min. Max. Unit
CPUT
CPUC
33Ω
33Ω
49.9Ω
49.9Ω
Measurement
Point
2pF
475Ω
IR E F
Measurement
Point
2pF
SRCT
SRCC
100Ω D ifferential
DOT96T
DOT96C
Figure 7. 0.7V Single-ended Load Configuration
CY28410-2
Document #: 38-07747 Rev *.* Page 15 of 17
For PCI Single-ended Signals and Reference
The following diagram shows the test load configurations for
the single-ended PCI, USB, and REF output signals.
Figure 8. Single-ended Load Configuration
PCI/
USB
REF
12Ω
Measurement
Point
5pF
12Ω
Measurement
Point
5pF
12Ω
Measurement
Point
5pF
12Ω
Measurement
Point
5pF
12Ω
Measurement
Point
5pF
60Ω
60Ω
60Ω
60Ω
60Ω
2.4V
0.4V
3.3V
0V
T
R
T
F
1.5V
3.3V si
g
nals
T
DC
-
-
Figure 9. Single-ended Output Signals (for AC Parameters Measurement)
Ordering Information
Part Number Package Type Product Flow
Lead-free and ROHS compliant
CY28410OXC -2 56-pin SSOP Commercial, 0° to 70°C
CY28410OXC -2T 56-pin SSOP – Tape and Reel Commercial, 0
° to 70°C
CY28410ZXC -2 56-pin TSSOP Commercial, 0
° to 70°C
CY28410ZXC -2T 56-pin TSSOP – Tape and Reel Commercial, 0
° to 70°C

CY28410OXC-2T

Mfr. #:
Manufacturer:
Silicon Labs
Description:
IC CLOCK CK410 GRANTSDALE 56SSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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