AD5100
Rev. A | Page 21 of 36
POWER REQUIREMENTS
INTERNAL POWER, V
REG
The AD5100 internal power, V
REG
, is derived from V
1MON
and
becomes active when V
2MON
reaches 2.2 V. V
2MON
is used to turn
AD5100 on and off with a different behavior depending on the
V
2MON
monitoring mode selection.
By default, the AD5100 turns on when the voltage at V
2MON
rises
above the logic threshold, V
2MON_ON
. When V
2MON
falls below the
logic threshold, V
2MON_OFF
, AD5100 turns off 2 seconds after
SHDN
is deasserted. Note that AD5100 requires 5 μs to start up
and that V
1MON
must be applied before V
2MON
. Extension of the
AD5100 turn-off allows the system to complete any housekeeping
tasks before the system is powered off. shows the
default V
2MON
and V
REG
waveforms.
Figure 18
Rising Edge Triggered Wake-Up Mode
If rising edge triggered wake-up V
2MON
mode is selected instead,
the AD5100 does not turn off when V
2MON
returns to a logic low.
To configure the part into rising edge triggered mode, set the
V
2MON
off threshold register, Register 0x04[3:1], to 1001.
In this mode, once the part is powered on, it can only be powered
down by an I
2
C power-down instruction or by removing the
supply on the V
1MON
pin. To power down the part over the I
2
C
bus while in rising edge triggered mode, the user must first
ensure that the software power down feature is enabled.
Register 0x18[3] = 0: enable software power-down feature
Register 0x18[3] =1: disable software power-down feature
The user must then write to Register 0x17[0], to actually power
down the AD5100.
Register 0x17[0] = 0: AD5100 not in software power-down
Register 0x17[0] = 1: power down AD5100
This feature is for applications that use a wake-up signal.
05692-018
V
2MON
V
2MON_ON*
V
2MON,IH
t
2SD_HOLD*
t
2SD_HOLD*
t
VREG_OFF_DELAY
t
VREG_OFF_DELAY
t
GLITCH
t
2SD_DELAY*
t
2SD_DELAY*
V
2MON_ON*
V
2MON_OFF*
V
2MON_OFF*
t
VREG_ON_DELAY
SHDN
V
REG
NOTES
1. 6V < V
1MON
< 30V
2. * = PROGRAMMABLE
t
2SD_DELAY*
Figure 18. Internal Power V
REG
vs. V
2MON
Timing Diagrams (Default)
AD5100
Rev. A | Page 22 of 36
PROTECTION
For automotive applications, proper external protections on the
AD5100 are needed to ensure reliable operation. The V
1MON
is
likely to be used for battery monitoring. The V
2MON
is likely to
be used for ignition switch or other critical inputs. As a result,
these inputs may need additional protections such as EMI, load
dump, and ESD protections. In addition, battery input requires
reverse battery protection and short-circuit fuse protection (see
Figure 19).
Overcurrent Protection
If the V
1MON
is shorted internally in the AD5100 to GND, the
short-circuit protection kicks in and limits subsequent current
to 150 mA in normal operation.
Thermal Shutdown
When the AD5100 junction temperature is near the junction
temperature limit, it automatically shuts down and cuts out the
power from V
1MON
. The part resumes operation when the device
junction temperature returns to normal.
ESD Protection
It is common to require a contact rating of ±8 kV and a no
contact or air rating of ±15 kV ESD protection for the
automotive electronics. As a result, an ESD-rated protection
device must be used, such as MMBZ27VCL, a dual 40 W
transient voltage suppressor (TVS) at the V
1MON
and V
2MON
.
Load Dump Protection
A load dump is a severe overvoltage surge that occurs when the
car battery is being disconnected from a spinning alternator and
a resulting long duration, high voltage surge is introduced into
the supply line. Therefore, external load dump protection is
recommended. Typically, the load dump overvoltage lasts for a
few hundred milliseconds and peaks at around 40 V to 70 V,
while current can be as high as 1 A. As a result, a load dump-
rated TVS D1 and D2, such as SMCJ17, are used to handle the
surge energy. A series resistor is an inline current limiting
resistor; it should be adequate to limit the current without
significant drop and yet small enough to not affect the input
monitoring accuracy.
Reverse Battery Protection
Reverse battery protection can be provided by a regular diode
if the battery monitoring accuracy can be relaxed. Otherwise,
a 60 V P-channel power MOSFET, like the NDT2955, can be
used. Because of the MOSFET internal diode, the battery first
conducts through the P1 body diode as soon as the voltage reaches
its source terminal. The voltage divider provides adequate gate-
to-source voltage to turn on P1, and the voltage drop across the
FET is negligible. The resistor divider values are chosen such
that the maximum V
GS
of the P1 is not violated and the current
drawn through the battery is only a few microamps.
EMI Protection
For EMI protection, a ferrite bead or EMC rated inductor, such
as DR331-7-103, can be used.
05692-020
DIGIPOT
DIGIPOT
V
2MON
V
1MON
D4
SMCJ17 MMBZ27VCL
D3
D2
SMCJ17
D1
R4
2.2
R3
2.2
VREF
V
REG
EN
R1
2M
R2
1.5M
C1
0.1µF
NDT2955
L1
10µH
DR331-7-103
F1
C2
0.1µF
C3
10µF
IGNITION SWITCH
L1
VMAIN
+
B+
P1
AD5100
Figure 19. Protection Circuits
AD5100
Rev. A | Page 23 of 36
AD5100 REGISTER MAP
Table 11 outlines the AD5100 register map, used to configure
and control all parameters and functions in the AD5100, and
indicates whether registers are writable, readable, or permanently
settable. All registers have the same address for read and write
operations.
The AD5100 ships from the factory with default power-up values
set in OTP memory. These default values are different for each
AD5100 model. However, nonprogrammed samples are avail-
able for evaluation purposes. The user can experiment with
different settings in the various threshold, delay, and
configuration registers.
Once evaluation is complete, the user should contact Analog
Devices with their desired OTP memory default values. Analog
Devices will create an AD5100 model with the desired default
settings and factory program the AD5100 OTP memory with
these defaults.
Some users may use the AD5100 as a set-and-forget device, that
is, program some default values and never need to change these
over the life of the application. However, some users may require
on-the-fly flexibility, that is, the ability to change settings to
values other than those they choose as their defaults. Register
writing, reading, OTP, and override are explained in the I
2
C
Serial Interface section.
Table 11. AD5100 Register Map
Register
Address
Read/
Write
Permanently
Settable Register Name and Bit Description
NonOTP Power-On
Default
1
0x01 R/W Yes V
1MON
overvoltage threshold 0x00 (18.00 V)
Bit No. Description
[3:0] Four bits used to program V
1MON
OV threshold
[7:4] Reserved
0x02 R/W Yes V
1MON
undervoltage threshold 0x00 (8.43 V)
Bit No. Description
[3:0] Four bits used to program V
1MON
UV threshold
[7:4] Reserved
0x03 R/W Yes V
2MON
turn-on threshold 0x00 (7.47 V)
Bit No. Description
[3:0] Four bits used to program V
2MON
on threshold
[7:4] Reserved
0x04 R/W Yes V
2MON
turn-off threshold 0x00 (6.95 V)
Bit No. Description
[3:0] Four bits used to program V
2MON
off threshold
[7:4] Reserved
0x05 R/W Yes
V
3MON
RESET Threshold
0x00 (2.93 V)
Bit No. Description
[2:0]
Three bits used to program V
3MON
RESET threshold
[7:3] Reserved
0x06 R/W Yes
V
4MON
RESET threshold
0x00 (7.54 V)
Bit No. Description
[2:0]
Three bits used to program V
4MON
RESET threshold
[7:3] Reserved
0x07 R/W Yes
V
1MON
OV/UV triggered SHDN hold (t
1SD_HOLD
)
0x00 (200 ms)
Bit No. Description
[2:0]
Three bits used to program V
1MON
OV/UV triggered SHDN hold time
[7:3] Reserved
0x08 R/W Yes
V
1MON
OV/UV triggered SHDN delay (t
1SD_DELAY
)
0x00 (1200 ms)
Bit No. Description
[2:0]
Three bits used to program V1MON OV/UV triggered SHDN
delay
time
[7:3] Reserved

AD5100YRQZ-1RL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits System-Mgmt IC w/ Prog VTG Monitor
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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