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NB7L72MMNHTBG

P1-P3P4-P6P7-P8
NB7L72M
www.onsemi.com
4
Table 5. DC CHARACTERISTICS, Multi−Level Inputs V
CC
= 2.375 V to 3.6 V, GND = 0 V, T
A
= −40°C to +85°C (Note 5)
Symbol
Characteristic Min Typ Max Unit
POWER SUPPLY CURRENT
V
CC
Power Supply Voltage V
CC
= 2.5 V
V
CC
= 3.3 V
2.375
3.0
2.5
3.3
2.625
3.6
V
I
CC
Power Supply Current (Inputs and Outputs Open) 80 135 175 mA
CML OUTPUTS
V
OH
Output HIGH Voltage (Note 6)
V
CC
= 3.3 V
V
CC
= 2.5 V
V
CC
– 40
3260
2460
V
CC
– 20
3280
2480
V
CC
3300
2500
mV
V
OL
Output LOW Voltage (Note 6)
V
CC
= 3.3 V
V
CC
= 2.5 V
V
CC
– 650
2650
V
CC
– 600
1900
V
CC
– 500
2800
V
CC
– 500
2000
V
CC
– 400
2900
V
CC
– 350
2150
mV
DIFFERENTIAL CLOCK INPUTS DRIVEN SINGLE−ENDED (Note 7) (Figures 5 and 7)
V
th
Input Threshold Reference Voltage Range (Note 8) 1050 V
CC
− 100 mV
V
IH
Single−Ended Input HIGH Voltage V
th
+ 100 V
CC
mV
V
IL
Single−Ended Input LOW Voltage GND V
th
− 100 mV
V
ISE
Single−Ended Input Voltage (V
IH
− V
IL
) 200 2800 mV
DIFFERENTIAL DATA/CLOCK INPUTS DRIVEN DIFFERENTIALLY (Figures 6 and 8) (Note 9)
V
IHD
Differential Input HIGH Voltage (INn, INn) 1100 V
CC
mV
V
ILD
Differential Input LOW Voltage (INn, INn) GND V
CC
− 100 mV
V
ID
Differential Input Voltage (INn, INn) (V
IHD
− V
ILD
) 100 1200 mV
V
CMR
Input Common Mode Range (Differential Configuration, Note 10)
(Figure 9)
950 V
CC
− 50 mV
I
IH
Input HIGH Current INn, INn (VTIN/VTIN Open) −150 150
mA
I
IL
Input LOW Current INn, INn (VTIN/VTIN Open) −150 150
mA
CONTROL INPUTS (SEL0, SEL1)
V
IH
Input HIGH Voltage for Control Pins 2.0 V
CC
V
V
IL
Input LOW Voltage for Control Pins GND 0.8 V
I
IH
Input HIGH Current −150 150
mA
I
IL
Input LOW Current −150 150
mA
TERMINATION RESISTORS
R
TIN
Internal Input Termination Resistor 40 50 60
W
R
TOUT
Internal Output Termination Resistor 40 50 60
W
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
5. Input and output parameters vary 1:1 with V
CC
.
6. CML outputs loaded with 50 W to V
CC
for proper operation.
7. V
th
, V
IH
, V
IL,,
and V
ISE
parameters must be complied with simultaneously.
8. V
th
is applied to the complementary input when operating in single−ended mode.
9. V
IHD
, V
ILD,
V
ID
and V
CMR
parameters must be complied with simultaneously.
10.V
CMR
min varies 1:1 with GND, V
CMR
max varies 1:1 with V
CC
. The V
CMR
range is referenced to the most positive side of the differential
input signal.
NB7L72M
www.onsemi.com
5
Table 6. AC CHARACTERISTICS V
CC
= 2.375 V to 3.6 V; GND = 0 V; T
A
= −40°C to 85°C (Note 11)
Symbol
Characteristic Min Typ Max Unit
f
MAX
Maximum Input Clock Frequency V
OUT
w 250 mV
V
OUT
w 200 mV
7.0
8.5
GHz
f
DATAMAX
Maximum Operating Data Rate (PRBS23) 10 Gbps
V
OUTPP
Output Voltage Amplitude (@ V
INPPmin
) f
in
≤ 8.5 GHz
(See Figures 3 and 10, Note 12)
200 400 mV
t
PLH
,
t
PHL
Propagation Delay to Differential Outputs,
@ 1GHz, Measured at Differential Cross−point
INn/INn to Qn/Qn
SELn to Qn/Qn
110 150 180 ps
t
PLH
TC Propagation Delay Temperature Coefficient 50
Dfs/°C
t
SKEW
Output−to−Output Skew (within device) (Note 13)
Device−to−Device Skew (t
pdmax
– t
pdmin
)
10
20
ps
t
DC
Output Clock Duty Cycle (Reference Duty Cycle = 50%) f
in
v 8.5GHz 45 50 55 %
t
jitter
RJ – Output Random Jitter (Note 14) fin v 8.5 GHz
DJ – Deterministic Jitter (Note 15) v 10 Gbps
0.2 0.5
10
ps RMS
ps pk−pk
V
INPP
Input Voltage Swing (Differential Configuration) (Note 16) 100 1200 mV
t
r,
, t
f
Output Rise/Fall Times @ 1 GHz (20% − 80%), Q, Q 25 30 50 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
11. Measured using a 400 mV source, 50% duty cycle clock source. All output loading with external 50 W to V
CC
. Input edge rates w40 ps
(20% − 80%).
12.Output voltage swing is a single−ended measurement operating in differential mode.
13.Skew is measured between outputs under identical transitions and conditions. Duty cycle skew is defined only for differential operation when
the delays are measured from cross−point of the inputs to the cross−point of the outputs.
14.Additive RMS jitter with 50% duty cycle clock signal.
15.Additive Peak−to−Peak data dependent jitter with input NRZ data at PRBS23.
16.Input voltage swing is a single−ended measurement operating in differential mode.
Figure 3. CLOCK Output Voltage Amplitude
(V
OUTPP
) vs. Input Frequency (f
in
) at Ambient
Temperature (Typ)
fin, Clock Input Frequency (GHz)
OUTPUT VOLTAGE AMPLITUDE
(mV)
500
450
400
350
300
200
0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0
Q AMP (mV)
Figure 4. Input Structure
50 W
50 W
V
Tn
V
CC
INn
INn
250
NB7L72M
www.onsemi.com
6
IN
V
th
IN
V
th
Figure 5. Differential Input Driven
Single−Ended
V
IH
V
IL
V
IHmax
V
ILmax
V
IH
V
th
V
IL
V
IHmin
V
ILmin
V
CC
V
thmax
V
thmin
GND
V
th
IN
IN
V
ILDmax
V
IHDmax
V
IHDtyp
V
ILDtyp
V
IHDmin
V
ILDmin
V
CMR
GND
V
ID
= V
IHD
− V
ILD
V
CC
IN
IN
Q
Q
t
PLH
t
PHL
V
OUTPP
= V
OH
(Q) − V
OL
(Q)
V
INPP
= V
IH
(IN) − V
IL
(IN)
V
IHD
V
ILD
V
ID
= |V
IHD(IN)
− V
ILD(IN)|
IN
IN
Figure 6. Differential Inputs
Driven Differentially
Figure 7. V
th
Diagram Figure 8. Differential Inputs Driven Differentially
Figure 9. V
CMR
Diagram Figure 10. AC Reference Measurement
IN
IN
V
CMmax
V
CMmin
Figure 11. Typical CML Output Structure and Termination
V
CC
50 W 50 W
16 mA
50 W 50 W
V
CC
(Receiver)
GND
NB7L72M Receiver
Q
Q
P1-P3P4-P6P7-P8

NB7L72MMNHTBG

Mfr. #:
Buy NB7L72MMNHTBG
Manufacturer:
ON Semiconductor
Description:
Clock Drivers & Distribution 2.5/3.3V XPOINT SWITCH
Lifecycle:
New from this manufacturer.
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