IS61C64AL ISSI
®
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
10/23/06
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
-10 -12
Symbol Parameter Test Conditions Min. Max. Min. Max. Unit
I
CC1 VDD Operating VDD = Max., CE = VIL Com. 20 20 mA
Supply Current IOUT = 0 mA, f = 0 Ind. 25 25
I
CC2 VDD Dynamic Operating VDD = Max., CE = VIL Com. 45 35 mA
Supply Current IOUT = 0 mA, f = fMAX Ind. 50 45
typ.
(2)
25 25
ISB1 TTL Standby Current VDD = Max., Com. 1 1 mA
(TTL Inputs) VIN = VIH or VIL Ind. 2 2
CE
V IH, f = 0
I
SB2 CMOS Standby VDD = Max., Com. 350 350 µA
Current (CMOS Inputs) CE
V DD – 0.2V, Ind. 450 450
V
IN
V DD – 0.2V, or typ.
(2)
200 200
VIN
0.2V, f = 0
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2. Typical values are measured at V
DD = 5V, TA = 25
o
C. Not 100% tested.
CAPACITANCE
(1,2)
Symbol Parameter Conditions Max. Unit
CIN Input Capacitance VIN = 0V 8 pF
COUT Output Capacitance VOUT = 0V 10 pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A = 25°C, f = 1 MHz, VDD = 5.0V.
1
2
3
4
5
6
7
8
9
10
11
12
IS61C64AL ISSI
®
Integrated Silicon Solution, Inc. — 1-800-379-4774
5
Rev. B
10/23/06
AC TEST CONDITIONS
Parameter Unit
Input Pulse Level 0V to 3.0V
Input Rise and Fall Times 3 ns
Input and Output Timing 1.5V
and Reference Levels
Output Load See Figures 1 and 2
AC TEST LOADS
Figure 2
480 Ω
5 pF
Including
jig and
scope
255 Ω
OUTPUT
5V
480 Ω
30 pF
Including
jig and
scope
255 Ω
OUTPUT
5V
Figure 1
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-10 ns -12 ns
Symbol Parameter Min. Max Min. Max. Unit
tRC Read Cycle Time 10 12 ns
tAA Address Access Time 10 12 ns
tOHA Output Hold Time 2 2 ns
tACS CE Access Time 10 12 ns
tDOE OE Access Time 6 6 ns
tLZOE
(2)
OE to Low-Z Output 0 0 ns
tHZOE
(2)
OE to High-Z Output 5 6 ns
tLZCS
(2)
CE to Low-Z Output 2 3 ns
tHZCS
(2)
CE to High-Z Output 5 7 ns
tPU
(3)
CE to Power-Up 0 0 ns
tPD
(3)
CE to Power-Down 10 12 ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
IS61C64AL ISSI
®
6
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
10/23/06
DATA VALID
READ1.eps
PREVIOUS DATA VALID
t
AA
t
OHA
t
OHA
t
RC
D
OUT
ADDRESS
t
RC
t
OHA
t
AA
t
DOE
t
LZOE
t
ACS
t
LZCS
t
HZOE
HIGH-Z
DATA VALID
CE_RD2.eps
ADDRESS
OE
CE
D
OUT
t
HZCS
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE = V
IL.
3. Address is valid prior to or coincident with CE LOW transitions.
READ CYCLE NO. 2
(1,3)
AC WAVEFORMS
READ CYCLE NO. 1
(1,2)

IS61C64AL-10TLI

Mfr. #:
Manufacturer:
ISSI
Description:
SRAM 64K 8Kx8 10ns 5V Async SRAM
Lifecycle:
New from this manufacturer.
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