Channel 2 Single-Ended Outputs
3, 25, 32, 38,
44
GND Ground
6 N.C. No Connection
7, 13, 18 LVDS GND LVDS Ground
8 RxIN0- Inverting Channel 0 LVDS Serial-Data Input
9 RxIN0+ Noninverting Channel 0 LVDS Serial-Data Input
10 RxIN1- Inverting Channel 1 LVDS Serial-Data Input
11 RxIN1+ Noninverting Channel 1 LVDS Serial-Data Input
12 LVDS V
CC
LVDS Supply Voltage. Bypass to LVDS GND with 0.1µF and 0.001µF capacitors in parallel as
close to LVDS V
CC
as possible, with the smallest value capacitor closest to the supply pin.
14 RxIN2- Inverting Channel 2 LVDS Serial-Data Input
15 RxIN2+ Noninverting Channel 2 LVDS Serial-Data Input
16 RxCLK IN- Inverting LVDS Parallel Rate Clock Input
17 RxCLK IN+ Noninverting LVDS Parallel Rate Clock Input
19, 21 PLL GND PLL Ground
20 PLL V
CC
PLL Supply Voltage. Bypass to PLL GND with 0.1µF and 0.001µF capacitors in parallel as
close to PLL V
CC
as possible, with the smallest value capacitor closest to the supply pin.
22 PWRDWN
5V Tolerant LVTTL/LVCMOS Power-Down Input. Internally pulled down to GND. Outputs are
high impedance when PWRDWN = low or open.
23 RxCLK OUT
Parallel Rate Clock Single-Ended Output. The MAX9234 has a rising-edge strobe. The
MAX9236/MAX9238 have a falling-edge strobe.
24, 26, 27, 29,
30, 31, 33
Channel 0 Single-Ended Outputs
28, 36, 48 V
CCO
Output Supply Voltage. Bypass to GND with 0.1µF and 0.001µF capacitors in parallel as
close to V
CCO
as possible, with the smallest value capacitor closest to the supply pin.
34, 35, 37, 39,
40, 41, 43
Channel 1 Single-Ended Outputs
42 V
CC
Digital Supply Voltage. Bypass to GND with 0.1µF and 0.001µF capacitors in parallel as close
to V
CC
as possible, with the smallest value capacitor closest to the supply pin.
