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ADIS16360BMLZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
ADIS16360/ADIS16365 Data Sheet
Rev. E | Page 4 of 20
Parameter Test Conditions/Comments Min Typ Max Unit
Gain Error ±2 LSB
Input Range 0 3.3 V
Input Capacitance During acquisition 20 pF
DAC OUTPUT 5 kΩ/100 pF to GND
Resolution 12 Bits
Relative Accuracy 101 LSB ≤ input code ≤ 4095 LSB ±4 LSB
Differential Nonlinearity ±1 LSB
Offset Error ±5 mV
Gain Error ±0.5 %
Output Range 0 3.3 V
Output Impedance 2 Ω
Output Settling Time 10 µs
LOGIC INPUTS
1
Input High Voltage, V
IH
2.0 V
Input Low Voltage, V
IL
0.8 V
CS
signal to wake up from sleep mode
0.55
V
CS
Wake-Up Pulse Width 20 µs
Logic 1 Input Current, I
IH
V
IH
= 3.3 V ±0.2 ±10 µA
Logic 0 Input Current, I
IL
V
IL
= 0 V
All Pins Except
RST
40 60 μA
RST
Pin 1 mA
Input Capacitance, C
IN
pF
DIGITAL OUTPUTS
1
Output High Voltage, V
OH
I
SOURCE
= 1.6 mA 2.4 V
Output Low Voltage, V
OL
I
SINK
= 1.6 mA 0.4 V
FLASH MEMORY Endurance
2
10,000 Cycles
Data Retention
3
T
J
= 85°C 20 Years
FUNCTIONAL TIMES
4
Time until data is available
Power-On Start-Up Time Normal mode, SMPL_PRD ≤ 0x09 180 ms
Low power mode, SMPL_PRD ≥ 0x0A 250 ms
Reset Recovery Time Normal mode, SMPL_PRD ≤ 0x09 60 ms
Low power mode, SMPL_PRD ≥ 0x0A 130 ms
Sleep Mode Recovery Time Normal mode, SMPL_PRD ≤ 0x09 4 ms
Low power mode, SMPL_PRD ≥ 0x0A 9 ms
Flash Memory Test Time
Normal mode, SMPL_PRD ≤ 0x09
ms
Low power mode, SMPL_PRD ≥ 0x0A 90 ms
Automatic Self-Test Time SMPL_PRD = 0x0001 12 ms
CONVERSION RATE SMPL_PRD = 0x0001 to 0x00FF 0.413 819.2 SPS
Clock Accuracy ±3 %
Sync Input Clock
5
0.8 1.2 kHz
POWER SUPPLY Operating voltage range, VCC 4.75 5.0 5.25 V
Power Supply Current Low power mode 24 mA
Normal mode 49 mA
Sleep mode 500 µA
1
The digital I/O signals are driven by an internal 3.3 V supply, and the inputs are 5 V tolerant.
2
Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C.
3
The data retention lifetime equivalent is at a junction temperature (T
J
) of 85°C as per JEDEC Standard 22, Method A117. Data retention lifetime decreases with junction
temperature.
4
These times do not include thermal settling and internal filter response times (330 Hz bandwidth), which may affect overall accuracy.
5
The sync input clock functions below the specified minimum value, at reduced performance levels.
Data Sheet ADIS16360/ADIS16365
Rev. E | Page 5 of 20
TIMING SPECIFICATIONS
T
A
= 25°C, VCC = 5 V, unless otherwise noted.
Table 2.
Normal Mode
(SMPL_PRD ≤ 0x09)
Low Power Mode
(SMPL_PRD ≥ 0x0A)
Burst Read
Parameter Description Min
1
Typ Max Min
1
Typ Max Min
1
Typ Max Unit
f
SCLK
Serial clock 0.01 2.0 0.01 0.3 0.01 1.0 MHz
t
STALL
Stall period between data 9 75 1/f
SCLK
µs
t
READRATE
Read rate 40 100 µs
t
CS
Chip select to SCLK edge 48.8 48.8 48.8 ns
t
DAV
DOUT valid after SCLK edge 100 100 100 ns
t
DSU
DIN setup time before SCLK rising edge 24.4 24.4 24.4 ns
t
DHD
DIN hold time after SCLK rising edge 48.8 48.8 48.8 ns
t
SCLKR
, t
SCLKF
SCLK rise/fall times
5
12.5
5
12.5
5
12.5
ns
t
DR
, t
DF
DOUT rise/fall times 5 12.5 5 12.5 5 12.5 ns
t
SFS
CS
high after SCLK edge 5 5 5 ns
t
1
Input sync positive pulse width 5 5 µs
t
x
Input sync low time 100 100 µs
t
2
Input sync to data ready output 600 600 µs
t
3
Input sync period 833 833 µs
1
Guaranteed by design and characterization, but not tested in production.
TIMING DIAGRAMS
CS
SCLK
DOUT
DIN
1 2 3 4 5 6 15 16
R/W A5A6 A4 A3 A2
D2
MSB
DB14
D1 LSB
DB13 DB12 DB10DB11 DB2 LSBDB1
t
CS
t
SFS
t
DAV
t
DHD
t
DSU
07570-002
Figure 2. SPI Timing and Sequence
CS
SCLK
t
READRATE
t
STALL
07570-003
Figure 3. Stall Time and Data Rate
t
3
t
X
t
2
t
1
SYNC
CLOCK (DIO4)
DATA
READY
07570-004
Figure 4. Input Clock Timing Diagram
ADIS16360/ADIS16365 Data Sheet
Rev. E | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Acceleration
Any Axis, Unpowered
2000
g
Any Axis, Powered 2000 g
VCC to GND −0.3 V to +6.0 V
Digital Input Voltage to GND −0.3 V to +5.3 V
Digital Output Voltage to GND −0.3 V to VCC + 0.3 V
Analog Input to GND −0.3 V to +3.6 V
Operating Temperature Range −40°C to +105°C
Storage Temperature Range −65°C to +125°C
1, 2
1
Extended exposure to temperatures outside the specified temperature
range of −40°C to +105°C can adversely affect the accuracy of the factory
calibration. For best accuracy, store the parts within the specified operating
range of −40°C to +105°C.
2
Although the device is capable of withstanding short-term exposure to
150°C, long-term exposure threatens internal mechanical integrity.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 4. Package Characteristics
Package Type θ
JA
θ
JC
Device Weight
24-Lead Module
(ML-24-2)
39.8°C/W 14.2°C/W 16 grams
ESD CAUTION
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

ADIS16360BMLZ

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Analog Devices Inc.
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IMUs - Inertial Measurement Units 6 Degree of Freedom Inertial Sensor
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