NTR3162PT1G

NTR3162P
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4
0
100
200
300
400
500
600
700
800
900
1000
1100
1200
1300
1400
0 5 10 15 20
V
GS
=0V
-- V
DS
, DRAIN--TO--SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
T
J
=25°C
f=1MHz
C
oss
C
iss
C
rss
Figure 7. Capacitance Variation
0
1
2
3
4
5
01234567891011
0
2
4
6
8
10
12
Q
g
, TOTAL GATE CHARGE (nC)
-- V
GS,
GATE --TO-- SOURCE VOLTAGE (V)
Figure 8. Gate--to--Source and Drain--to--Source
Voltage vs. Total Gate Charge
-- V
DS,
DRAIN--TO--SOURCE VOLTAGE (V)
V
DS
=--10A
I
D
=--3.6A
T
J
=25°C
Q
gd
Q
gs
-- V
GS
Q
T
-- V
DS
1
10
100
1000
1 10 100
R
G
, GATE RESISTANCE (Ω)
t, TIME (ns)
V
DD
=--10V
I
D
=--3.6A
V
GS
=--4.5V
t
d(off)
t
d(on)
t
f
t
r
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
0.1
1.0
10
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
-- V
SD
, SOURCE--TO--DRAIN VOLTAGE (V)
-- I
S
, SOURCE CURRENT (A)
Figure 10. Diode Forward Voltage vs. Current
T
J
= 125°C
T
J
= 150°C
T
J
=--55°C
T
J
=25°C
0.2
0.3
0.4
0.5
0.6
0.7
0.8
--50 --25 0 25 50 75 100 125 150
Figure 11. Threshold Voltage
T
J
, JUNCTION TEMPERATURE (°C)
I
D
= --250 mA
-- V
GS(th)
(V)
0
10
20
30
40
50
60
70
80
0.0001 0.001 0.01 0.1 1 10 100 1000
POWER (W)
Figure 12. Single Pulse Maximum Power
Dissipation
SINGLE PULSE TIME (s)
NTR3162P
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5
0.01
0.1
1
10
100
0.1 1 10 100
Figure 13. Maximum Rated Forward Biased
Safe Operating Area
V
DS
, DRAIN--TO--SOURCE VOLTAGE (V)
R
DS(on)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
V
GS
=--8V
SINGLE PULSE
T
C
=25°C
1ms
100 ms
10 ms
dc
-- I
D,
DRAIN CURRENT (A)
0.01
0.1
1
0.0001 0.001 0.01 0.1 1 10 100 1000
t, TIME (s)
Figure 14. Thermal Response
r(t), TRANSIENT THERMAL RESISTANCE
Duty Cycle = 0.5
0.2
0.1
0.05
0.01
SINGLE PULSE
0.02
NTR3162P
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6
PACKAGE DIMENSIONS
SOT--23 (T O--236)
CASE 318--08
ISSUE AN
D
A1
3
12
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION : INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS OF
BASE MATERIAL.
4. 318--01 THRU --07 AND --09 OBSOLETE, NEW
STANDARD 318--08.
mm
inches
SCALE 10:1
0.8
0.031
0.9
0.035
0.95
0.037
0.95
0.037
2.0
0.079
SOLDERING FOOTPRINT
VIEW C
L
0.25
L1
θ
e
E
E
b
A
SEE VIEW C
DIM
A
MIN NOM MAX MIN
MILLIMETERS
0.89 1.00 1.11 0.035
INCHES
A1 0.01 0.06 0.10 0.001
b 0.37 0.44 0.50 0.015
c 0.09 0.13 0.18 0.003
D 2.80 2.90 3.04 0.110
E 1.20 1.30 1.40 0.047
e 1.78 1.90 2.04 0.070
L 0.10 0.20 0.30 0.004
0.040 0.044
0.002 0.004
0.018 0.020
0.005 0.007
0.114 0.120
0.051 0.055
0.075 0.081
0.008 0.012
NOM MAX
L1
H
2.10 2.40 2.64 0.083 0.094 0.104
H
E
0.35 0.54 0.69 0.014 0.021 0.029
c
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
*For additional information on our Pb--Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer ’s technical experts. SCILLC does not convey any license under its patent rights
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NTR3162PT1G

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Manufacturer:
ON Semiconductor
Description:
MOSFET PFET SOT23 20V TR
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New from this manufacturer.
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