AD9833SRMZ-EP-RL7

Low Power, 12.65 mW, 2.3 V to 5.5 V,
Programmable Waveform Generator
Enhanced Product
AD9833-EP
Rev. 0 Document Feedback
Informat
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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FEATURES
Digitally programmable frequency and phase
12.65 mW power consumption at 3 V
0 MHz to 12.5 MHz output frequency range
28-bit resolution: 0.1 Hz at 25 MHz reference clock
Sinusoidal, triangular, and square wave outputs
2.3 V to 5.5 V power supply
No external components required
3-wire SPI interface
Power-down option
10-lead MSOP package
Enhanced product features
Supports defense and aerospace applications (AQEC)
Temperature range: 55°C to +125°C
Controlled manufacturing baseline
1 assembly/test site
1 fabrication site
Enhanced product change notification
Qualification data available upon request
APPLICATIONS
Frequency stimulus/waveform generation
Liquid and gas flow measurement
Sensory applications: proximity, motion, defect detection
Line loss/attenuation
Test and medical equipment
Sweep/clock generators
Time domain reflectometry (TDR) applications
GENERAL DESCRIPTION
The AD9833-EP is a low power, programmable waveform
generator capable of producing sine, triangular, and square
wave outputs. Waveform generation is required in various types
of sensing, actuation, and time domain reflectometry (TDR)
applications. The output frequency and phase are software pro-
grammable, allowing easy tuning. No external components are
needed. The frequency registers are 28 bits wide. With a 25 MHz
clock rate, a resolution of 0.1 Hz can be achieved; with a 1 MHz
clock rate, the AD9833-EP can be tuned to 0.004 Hz resolution.
The AD9833-EP is written to via a 3-wire serial interface. This
serial interface operates at clock rates up to 40 MHz and is
compatible with DSP and microcontroller standards. The device
operates with a power supply from 2.3 V to 5.5 V.
The AD9833-EP has a power-down function (SLEEP). This
function allows sections of the device that are not being used to be
powered down, thus minimizing the current consumption of the
part. For example, the DAC can be powered down when a clock
output is being generated.
The AD9833-EP is available in a 10-lead MSOP package.
Additional application and technical information can be found
in the AD9833 data sheet.
FUNCTIONAL BLOCK DIAGRAM
SERIAL INTERFACE
AND
CONTROL LOGIC
SCLK SDATAFSYNC
CONTROL REGISTER
PHASE1 REG
PHASE0 REG
MUX
SIN
ROM
10-BIT DAC
MUX
FREQ0 REG
FREQ1 REG
12
ON-BOARD
REFERENCE
AGND
DGND
VDD
AD9833-EP
PHASE
ACCUMULATOR
(28-BIT)
REGULATOR
CAP/2.5V
2.5V
AVDD/
DVDD
MUX
DIVIDE
BY 2
MSB
MUX
FULL-SCALE
CONTROL
COMP
VOUT
R
200Ω
MCLK
11545-001
Figure 1.
AD9833-EP Enhanced Product
Rev. 0 | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Characteristics ................................................................ 4
Absolute Maximum Ratings ............................................................5
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions ..............................6
Typical Performance Characteristics ..............................................7
Outline Dimensions ....................................................................... 10
Ordering Guide .......................................................................... 10
REVISION HISTORY
8/13—Revision 0: Initial Version
Enhanced Product AD9833-EP
Rev. 0 | Page 3 of 12
SPECIFICATIONS
VDD = 2.3 V to 5.5 V, AGND = DGND = 0 V, T
A
= T
MIN
to T
MAX
, R
SET
= 6.8 kΩ for VOUT, unless otherwise noted.
Table 1.
Parameter
1
Min Typ Max Unit Test Conditions/Comments
SIGNAL DAC SPECIFICATIONS
Resolution 10 Bits
Update Rate 25 MSPS
VOUT Maximum 0.65 V
VOUT Minimum 38 mV
VOUT Temperature Coefficient 200 ppm/°C
DC Accuracy
Integral Nonlinearity ±1.0 LSB
Differential Nonlinearity ±0.5 LSB
DDS SPECIFICATIONS (SFDR)
Dynamic Specifications
Signal-to-Noise Ratio (SNR) 53.5 60 dB f
MCLK
= 25 MHz, f
OUT
= f
MCLK
/4096
Total Harmonic Distortion (THD) −66 −53.5 dBc f
MCLK
= 25 MHz, f
OUT
= f
MCLK
/4096
Spurious-Free Dynamic Range (SFDR)
Wideband (0 to Nyquist) −60 dBc f
MCLK
= 25 MHz, f
OUT
= f
MCLK
/50
Narrow-Band (±200 kHz) −78 dBc f
MCLK
= 25 MHz, f
OUT
= f
MCLK
/50
Clock Feedthrough −60 dBc
Wake-Up Time 1 ms
LOGIC INPUTS
Input High Voltage, V
INH
1.7 V 2.3 V to 2.7 V power supply
2.0 V 2.7 V to 3.6 V power supply
2.8 V 4.5 V to 5.5 V power supply
Input Low Voltage, V
INL
0.5 V 2.3 V to 2.7 V power supply
0.7 V 2.7 V to 3.6 V power supply
0.8 V 4.5 V to 5.5 V power supply
Input Current, I
INH
/I
INL
10 μA
Input Capacitance, C
IN
3 pF
POWER SUPPLIES f
MCLK
= 25 MHz, f
OUT
= f
MCLK
/4096
VDD 2.3 5.5 V
I
DD
4.5 5.5 mA I
DD
code dependent; see Figure 7
Low Power Sleep Mode 0.5 mA DAC powered down, MCLK running
1
Operating temperature range is −55°C to +125°C; typical specifications are at 25°C.
VOUT
COMP
12
AD9833-EP
10-BIT DAC
SIN
ROM
20pF
10nF
VDD
REGULATOR
100nF
CAP/2.5V
11545-002
Figure 2. Test Circuit Used to Test Specifications

AD9833SRMZ-EP-RL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Data Acquisition ADCs/DACs - Specialized 10 bit 10 pin DDS I.C.
Lifecycle:
New from this manufacturer.
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