Input Capacitor Selection
The input capacitor reduces the current peaks drawn
from the input supply and reduces noise injection into
all devices running from that supply. The input voltage
source impedance determines the required size of the
input capacitor. The standard application circuits
(Figures 1, 6, and 7) use an input capacitor equal to the
output capacitor to accommodate the high impedance
seen in a typical lab environment. Actual applications
usually have much lower source impedance since the
step-up regulator typically runs directly from a low-
impedance battery. Often, the input capacitor can be
reduced by 50% or more of the output capacitor value.
To prevent noise from coupling into the device, connect
an additional 0.1µF ceramic capacitor from the IN pin to
the GND pin. Place that capacitor within 5mm of the pins.
Setting the Maximum LED Current
The full-scale current through each LED can be set
using SETI. When SETI is connected to IN, the full-scale
LED current is set to the default value of 18mA. When
SETI is connected to GND, the LED current is set to
0.5mA LED test mode. If SETI is connected with a resis-
tor to GND, the full-scale LED current can be adjusted
from 14mA to 25mA:
where K = 3851, and V
REF
is the internal reference
voltage.
PC Board Layout and Grounding
Careful PC board layout is very important for proper
operation. Use the following guidelines for good PC
board layout:
1) Minimize the area of high-current loops by placing
the input capacitors, inductor, and output capaci-
tors less than 0.2in (5mm) from the LX and GND
pins. Connect these components with wide traces.
Avoid using vias in the high-current paths. If vias
are unavoidable, use many vias in parallel to
reduce resistance and inductance.
2) Create islands for the analog ground and power
ground. The analog ground island includes the
exposed backside pad of the device, the REF
bypass capacitor ground, and the SETI resistor
ground. The power ground island includes the GND
pin, the common ground for the current regulators
(LDG), and the step-up regulator’s input/output
capacitor grounds. The analog ground and power
ground islands are connected together at only one
location using a short trace between the GND pin
and the exposed backside pad underneath the
device.
3) Maximize the width of the power ground traces to
improve efficiency, and reduce output-voltage rip-
ple and noise spikes.
4) Place the IN pin and REF pin bypass capacitors
within 5mm to the device.
5) Minimize the size of LX node while keeping it wide
and short to reduce radiated EMI.
Refer to the MAX1985 evaluation kit for an example of
proper board layout.
Chip Information
TRANSISTOR COUNT: 3016
.
