ADG849
Rev. 0| Page 6 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
TOP VIEW
(Not to Scale)
6
5
4
1
2
3
IN
S2
ADG849
V
DD
GND
D
S1
04737-0-002
Figure 2. Pin Configuration
Table 5. Terminology
Mnemonic Function
V
DD
Most Positive Power Supply Potential.
GND Ground (0 V) Reference.
I
DD
Positive Supply Current.
S Source Terminal. May be an input or output.
D Drain Terminal. May be an input or output.
IN Logic Control Input.
R
ON
Ohmic Resistance between D and S.
∆R
ON
On-Resistance Match Between any Two Channels i.e., R
ON
Maximum to R
ON
Minimum.
R
FLAT(ON)
Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the
specified analog signal range.
I
S
(Off) Source Leakage Current with the Switch Off.
I
D
, I
S
(On) Channel Leakage Current with the Switch On.
V
D
(V
S
) Analog Voltage on Terminals D, S.
V
INL
Maximum Input Voltage for Logic 0.
V
INH
Minimum Input Voltage for Logic 1.
I
INL
(I
INH
) Input Current of the Digital Input.
C
S
(Off) Off Switch Source Capacitance. Measured with reference to ground.
C
D
, C
S
(On) On Switch Capacitance. Measured with reference to ground.
t
ON
Delay time between the 50% and 90% points of the digital input and switch on condition.
t
OFF
Delay time between the 50% and 90% points of the digital input and switch off condition.
t
BBM
On or off time measured between the 80% points of both switches when switching from one to another.
Charge
Injection
A measure of the glitch impulse transfered from the digital input to the analog output during switching.
Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance.
Off Isolation A measure of unwanted signal coupling through an off switch.
Bandwidth The frequency at which the output is attenuated by 3 dB.
On-Response The frequency response of the on switch.
Insertion Loss The loss due to the on-resistance of the switch.
THD + N The ratio of harmonic amplitudes plus the noise of a signal to the fundamental.
