EVAL-ADG5462FEBZ

UG-908 EVAL-ADG5462FEBZ User Guide
Rev. 0 | Page 4 of 12
GETTING STARTED
EVALUATION BOARD SETUP PROCEDURE
The E VA L -ADG5462FEBZ operates independently and does
not require any additional evaluation boards or software to operate.
An on-board LDO regulator is the digital power supply for the
LEDs and manually controls the ADG5462F.
Supply the E VA L -ADG5462FEBZ with a dual power source of
up to ±22 V or a single supply of up to +44 V by connecting
VSS and GND together.
Follow these steps to conduct a functionality test:
1. Connect a power supply to J3. Connect VSS and GND
together if a single supply is required.
2. Ensure that a 0 Ω resistor is inserted in R18 to use the
on-board LDO regulator and that a 0 Ω resistor is inserted
in R20.
3. Control the digital signals for the ADG5462F by using SW1.
4. Verify that LED1 is green; this indicates that the mux is
operating normally.
POSFV
J4
VDD
R20 = LDO
ADP7142
(LDO)
S1
POSFV
ADG5462F
R41 = VLR39 = VDD
R34 = POSFV
R42 = GND
R35 = VSS
R40 = NEGFV
D1
R21 = EXT VL
EXT_VL
J3
J3
J1-1
V
DD
NEGFVV
SS
J2-1
NEGFV
J4
GND
VSS
J3
S1 D1
J1-2
J2-3
S1 D1
J1-3
J2-3
S1
DR
GND
FF
D1
J1-4
SW1
O/C
RAILS
J2-4
LED
R15
VL
VL
13822-002
Figure 2. EVAL-ADG5462FEBZ Block Diagram
EVAL-ADG5462FEBZ User Guide UG-908
Rev. 0 | Page 5 of 12
EVALUATION BOARD HARDWARE
To evaluate the ADG5462F use the E VA L -ADG5462FEBZ.
Figure 1 shows a typical evaluation setup where only a power
supply and signal generator are required. Figure 2 shows the
block diagram of the main components of the evaluation board.
In this evaluation board, the ADG5462F passes signals from
either the source or drain connectors. The source pins have
fault detection circuitry that react to an overvoltage event. During
an overvoltage event, the channel on which the fault occurs
turns off, and the FF pin pulls low. See the ADG5462F data
sheet for more details.
POWER SUPPLY
Connector J3 provides access to the supply pins of the ADG5462F.
VDD, GND, and VSS link to the appropriate pins on the
ADG5462F. For dual-supply voltages, the EVA L -ADG5462FEBZ
is powered from ±5 V to ±22 V. For single-supply voltages, the
GND and VSS terminals are connected together to power the
EVAL-ADG5462FEBZ from 8 V to 44 V. Additionally, an on-
board LDO regulator provides the digital control voltage. If
necessary, connect a secondary voltage source to EXT_VL and
use it to control the digital voltages. To use EXT_VL, move the
0 Ω resistor from R20 to R21. Do not expose the on-board LDO
regulator to voltages greater than 28 V; remove R18 and supply
an alternative digital voltage via EXT_VL, if required.
INPUT SIGNALS
Two screw connectors connect to both the source and drain
pins of the ADG5462F. Additional subminiature Version B
(SMB) connector pads are available if extra connections are
required. The ADG5462F is overvoltage protected on the source
side, and each source terminal (S1 to S4) can be presented with a
voltage of up to +55 V or to −55 V. See the ADG5462F data sheet
for more details.
Each trace on the source and drain side includes two sets of
0603 pads, which place a load on the signal path to ground. A
0 Ω resistor is placed in the signal path and can be replaced
with a user defined value. The resistor combined with the 0603
pads creates a simple resistor capacitor (RC) filter.
OUTPUT SIGNALS
The FF pin indicates when the device is operating normally or
whether there is an overvoltage fault on one of the source pins.
For visual indication, LEDs are mounted on the EVA L-
ADG5462FEBZ. When the device operates normally, the FF pin
remains high, and LED1 illuminates green. If an overvoltage
occurs at any of the source pins, the FF pin pulls low, and LED2
illuminates red.
UG-908 EVAL-ADG5462FEBZ User Guide
Rev. 0 | Page 6 of 12
JUMPER SETTINGS
SWITCHES AND 0 Ω RESITORS
The switches manually control the ADG5462F, and 0 Ω resistors
configure the digital control voltage, the voltage present on
POSFV and NEGFV, to isolate the LED from the rest of the
system.
Use SW1 to configure the DR pin. The RAILS position is tied to
GND and enables the drain to pull to POSFV or NEGFV during
an overvoltage fault condition. The O/C position is tied to VL,
and the drain is open-circuit condition.
R18 connects the on-board LDO regulator to the VDD supply.
Remove this resistor to protect the LDO regulator from voltages
higher than 28 V. Move the 0 resistor R20 to R21 to use an
alternative digital voltage connected to EXT_VL.
Resistors R14 and R36 connect the LEDs to the digital power
supply, and Resistors R37 and R13 connect the FF pin of the
ADG5462F to the LED controls.
Resistors R34, R39, and R41 configure POSFV to either the
voltage present on POSFV on J4 (VDD) or VL. Resistors R35,
R40, and R42 configure NEGFV to either VSS, the voltage
present on NEGFV on J4, or GND.
SMB CONNECTORS
The DR SMB connector can allow control via the external
control signals.
The FF SMB connector can access the FF digital output from the
ADG5462F.
Table 1. Switch and 0 Ω Resistor Descriptions
Label Position Description
SW1 O/C Logic 1 on DR pin
RAILS
Logic 0 on DR pin
R35, R40, R42 R35 NEGFV set to VSS
R40 NEGFV set to voltage on J4
NEGFV screw terminal
R42 NEGFV set to GND
R34, R39, R41 R34 POSFV set to voltage on J4
POSFV screw terminal
R39 POSFV set to VDD
R41 POSFV set to VL
R20, R21
R20
On-board LDO regulator digital
voltage
R21 EXT_VL digital voltage
R18 Inserted LDO regulator powered up
Removed LDO regulator unpowered
R37, R13
Inserted
FF pin connected to LED
Removed FF pin disconnected from LED
R14, R36
Inserted
LED connected to digital supply
Removed LED isolated
R15 Inserted 1 kΩ pull-up resistor at FF pin
Removed No external pull-up resistor at FF
pin

EVAL-ADG5462FEBZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Switch IC Development Tools EVALUATION BOARD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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