CA3420E

1
®
FN1320.9
CA3420
0.5MHz, Low Supply Voltage, Low Input
Current BiMOS Operational Amplifier
The CA3420 is an integrated circuit operational amplifier that
combines PMOS transistors and bipolar transistors on a
single monolithic chip. The CA3420 BiMOS operational
amplifier features gate protected PMOS transistors in the
input circuit to provide very high input impedance, very low
input currents (less than 1pA). The internal bootstrapping
network features a unique guardbanding technique for
reducing the doubling of leakage current for every 10°C
increase in temperature. The CA3420 operates at total
supply voltages from 2V to 20V either single or dual supply.
This operational amplifier is internally phase compensated to
achieve stable operation in the unity gain follower
configuration. Additionally, it has access terminals for a
supplementary external capacitor if additional frequency roll-
off is desired. Terminals are also provided for use in
applications requiring input offset voltage nulling. The use of
PMOS in the input stage results in common mode input
voltage capability down to 0.45V below the negative supply
terminal, an important attribute for single supply application.
The output stage uses a feedback OTA type amplifier that
can swing essentially from rail-to-rail. The output driving
current of 1.5mA (Min) is provided by using nonlinear current
mirrors.
Features
2V Supply at 300µA Supply Current
1pA Input Current (Typ) (Essentially Constant to 85°C)
Rail-to-Rail Output Swing (Drive ±2mA into 1k Load)
Pin Compatible with 741 Operational Amplifiers
Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
pH Probe Amplifiers
Picoammeters
Electrometer (High Z) Instruments
Portable Equipment
Inaccessible Field Equipment
Battery-Dependent Equipment (Medical and Military)
Functional Diagram
Pinout
CA3420 (PDIP)
TOP VIEW
Ordering Information
PART
NUMBER
PART
MARKING
TEMP.
RANGE (°C) PACKAGE
PKG.
DWG. #
CA3420E CA3420E -55 to 125 8 Ld PDIP E8.3
CA3420EZ
(Note)
CA3420EZ -55 to 125 8 Ld PDIP*
(Pb-free)
E8.3
*Pb-free PDIPs can be used for through hole wave solder
processing only. They are not intended for use in Reflow solder
processing applications.
NOTE: Intersil Pb-free plus anneal products employ special
Pb-free material sets; molding compounds/die attach materials and
100% matte tin plate termination finish, which are RoHS compliant
and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
MOS
BIPOLAR
X1
X1
MOS
BIPOLAR
OTA BUFFER
(X2)
HIGH GAIN
(50K)
BUFFER AMPS;
BOOTSTRAPPED
INPUT PROTECTION
NETWORK
-
+
1
2
3
4
8
7
6
5
+
V+
OFFSET NULL
INV.
INPUT
V-
NON-INV.
INPUT
STROBE
OUTPUT
OFFSET NULL
-
Data Sheet October 4, 2005
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002, 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
2
FN1320.9
October 4, 2005
Absolute Maximum Ratings Thermal Information
Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . (V+ + 8V) to (V- -0.5V)
Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA
Output Short Circuit Duration (Note 1). . . . . . . . . . . . . . . . Indefinite
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to 125°C
Thermal Resistance (Typical, Note 2) θ
JA
(°C/W) θ
JC
(°C/W)
PDIP Package* . . . . . . . . . . . . . . . . . . 105 N/A
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Short circuit may be applied to ground or to either supply.
2. θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications Typical Values Intended Only for Design Guidance, V
SUPPLY
= ±10V, T
A
= 25°C
PARAMETER SYMBOL TEST CONDITIONS TYP UNITS
Input Resistance R
I
150 T
Input Capacitance C
I
4.9 pF
Output Resistance R
O
300
Equivalent Input Noise Voltage e
N
f = 1kHz R
S
= 100 62 nV/Hz
f = 10kHz 38 nV/Hz
Short-Circuit Current Source I
OM
+2.6mA
To Opposite Supply Sink I
OM
-2.4mA
Gain Bandwidth Product f
T
0.5 MHz
Slew Rate SR 0.5 V/µs
Transient Response Rise Time t
R
R
L
= 2k, C
L
= 100pF 0.7 µs
Overshoot OS 15 %
Current from Terminal 8 To V- I
8
+20µA
To V+ I
8
-2mA
Electrical Specifications For Equipment Design, At V
SUPPLY
= ±1V, T
A
= 25°C, Unless Otherwise Specified
PARAMETER SYMBOL
TEST
CONDITIONS MIN TYP MAX UNITS
Input Offset Voltage |V
IO
| - 5 10 mV
Input Offset Current (Note 3) |I
IO
| - 0.01 4 pA
Input Current (Note 3) |I
I
|-15pA
Large Signal Voltage Gain A
OL
R
L
= 10k 10 100 - kV/V
80 100 - dB
Common Mode Rejection Ratio CMRR - 560 1800 µV/V
55 65 - dB
Common Mode Input Voltage Range V
lCR
+0.20.5- V
V
lCR
---1.3- V
Power Supply Rejection Ratio PSRR V
IO
/V - 100 1000 µV/V
60 80 - dB
Max Output Voltage V
OM
+R
L
= 0.90 0.95 - V
V
OM
- -0.85 -0.91 - V
Supply Current I+ - 350 650 µA
Device Dissipation P
D
-0.71.1 mW
Input Offset Voltage Temperature Drift V
lO
/T- 4-µV/°C
NOTE:
3. The maximum limit represents the levels obtainable on high speed automatic test equipment. Typical values are obtained under laboratory conditions.
CA3420
3
FN1320.9
October 4, 2005
Typical Applications
Picoammeter Circuit
The exceptionally low input current (typically 0.2pA) makes
the CA3420 highly suited for use in a picoammeter circuit.
With only a single 10G resistor, this circuit covers the range
from ±1.5pA. Higher current ranges are possible with suitable
switching techniques and current scaling resistors. Input
transient protection is provided by the 1M resistor in series
with the input. Higher current ranges require that this resistor
be reduced. The 10M resistor connected to pin 2 of the
CA3420 decouples the potentially high input capacitance
often associated with lower current circuits and reduces the
tendency for the circuit to oscillate under these conditions.
High Input Resistance Voltmeter
Advantage is taken of the high input impedance of the CA3420
in a high input resistance DC voltmeter. Only two 1.5V “AA”
type penlite batteries power this exceedingly high-input
resistance (>1,000,000M) DC voltmeter. Full-scale deflection
is ±500mV, ±150mV, and ±15mV. Higher voltage ranges are
easily added with external input voltage attenuator networks.
The meter is placed in series with the gain network, thus
eliminating the meter temperature coefficient error term.
Supply current in the standby position with the meter
undeflected is 300µA. At full-scale deflection this current
rises to 800µA. Carbon-zinc battery life should be in excess
of 1,000 hours.
Electrical Specifications For Equipment Design, at V
SUPPLY
= ±10V, T
A
= 25°C, Unless Otherwise Specified
PARAMETER SYMBOL
TEST
CONDITIONS MIN TYP MAX UNITS
Input Offset Voltage |V
IO
| - 5 10 mV
Input Offset Current (Note 4) |I
IO
| - 0.03 4 pA
Input Current (Note 4) |I
I
| - 0.05 5 pA
Large Signal Voltage Gain A
OL
R
L
= 10k 10 100 - kV/V
80 100 - dB
Common Mode Rejection Ratio CMRR - 100 320 µV/V
70 80 - dB
Common Mode Input Voltage Range V
lCR
+8.59.3- V
V
lCR
- -10 -10.3 - V
Power Supply Rejection Ratio PSRR V
IO
/V - 32 320 µV/V
70 90 - dB
Max Output Voltage V
OM
+R
L
= 9.7 9.9 - V
V
OM
- -9.7 -9.85 - V
Supply Current I+ - 450 1000 µA
Device Dissipation P
D
-914 mW
Input Offset Voltage Temperature Drift V
lO
/T- 4-µV/°C
NOTE:
4. The maximum limit represents the levels obtainable on high speed automatic test equipment. Typical values are obtained under laboratory conditions.
3
CA3420
4
500-0-500
7
+1.5V
5
1
2
-1.5V
10pF
10G
10M1M
BATTERY
RETURNS
10k
6 M
µA
±50pA
±15pA
±5pA
±1.5pA
11k
1.5k, 1%
1.5k
1k
430, 1%
150, 1%
68
1%
-
+
FIGURE 1. PICOAMMETER CIRCUIT
2
CA3420
4
500-0-500
7
+1.5V
5
1
3
-1.5V
10M22M
BATTERY
RETURNS
10k
6 M
µA
±500mV
±150mV
±50mV
±15mV
1.1k
1.5k, 1%
1.5k
1k
430, 1%
150, 1%
68
1%
-
+
100pF
FIGURE 2. HIGH INPUT RESISTANCE VOLTMETER
CA3420

CA3420E

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
IC OPAMP GP 1 CIRCUIT 8DIP
Lifecycle:
New from this manufacturer.
Delivery:
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